Skip to content

Commit 165e6b3

Browse files
thomaseichingerthomaseichinger
committed
board/iot-lab_M3: working with -O0
1 parent cb861b0 commit 165e6b3

File tree

3 files changed

+60
-53
lines changed

3 files changed

+60
-53
lines changed

‎boards/iot-lab_M3/Makefile.include

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ export RESET = $(RIOTBOARD)/$(BOARD)/dist/reset.sh
3030
# define build specific options
3131
export CPU_USAGE = -mcpu=cortex-m3
3232
export FPU_USAGE =
33-
export CFLAGS += -ggdb -g3 -std=gnu99 -Os -Wall -Wstrict-prototypes $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -mthumb -mthumb-interwork -nostartfiles
33+
export CFLAGS += -ggdb -g3 -std=gnu99 -O0 -Wall -Wstrict-prototypes $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -mthumb -mthumb-interwork -nostartfiles
3434
export CFLAGS += -ffunction-sections -fdata-sections -fno-builtin
3535
export ASFLAGS += -ggdb -g3 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian
3636
export LINKFLAGS += -ggdb -g3 -std=gnu99 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -static -lgcc -mthumb -mthumb-interwork -nostartfiles

‎boards/iot-lab_M3/include/periph_conf.h

Lines changed: 18 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -130,23 +130,28 @@
130130
#define GPIO_14_EN 1
131131
#define GPIO_IRQ_PRIO 1
132132

133-
/* IRQ config */
134-
#define GPIO_IRQ_0 GPIO_0
135-
#define GPIO_IRQ_1 GPIO_1
136-
#define GPIO_IRQ_2 GPIO_0 /* not configured */
137-
#define GPIO_IRQ_3 GPIO_0 /* not configured */
138-
#define GPIO_IRQ_4 GPIO_2
139-
#define GPIO_IRQ_5 GPIO_3
140-
#define GPIO_IRQ_6 GPIO_4
133+
/**
134+
* @brief IRQ config
135+
*
136+
* These defines are used for the backmapping in the matching interrupt
137+
* service routines to call the correct callbacks.
138+
*/
139+
#define GPIO_IRQ_1 GPIO_13
140+
#define GPIO_IRQ_2 GPIO_14
141+
#define GPIO_IRQ_3 GPIO_0
142+
#define GPIO_IRQ_4 GPIO_12
143+
#define GPIO_IRQ_5 GPIO_8
144+
#define GPIO_IRQ_6 GPIO_9
141145
#define GPIO_IRQ_7 GPIO_5
142-
#define GPIO_IRQ_8 GPIO_0 /* not configured */
143-
#define GPIO_IRQ_9 GPIO_0 /* not configured */
144-
#define GPIO_IRQ_10 GPIO_6
146+
#define GPIO_IRQ_8 GPIO_1
147+
#define GPIO_IRQ_9 GPIO_4
145148
#define GPIO_IRQ_11 GPIO_7
146-
#define GPIO_IRQ_12 GPIO_4
149+
#define GPIO_IRQ_12 GPIO_2
147150
#define GPIO_IRQ_13 GPIO_9
148151
#define GPIO_IRQ_14 GPIO_10
149-
#define GPIO_IRQ_15 GPIO_11
152+
/* not configured */
153+
#define GPIO_IRQ_0 (GPIO_NUMOF-1)
154+
#define GPIO_IRQ_10 (GPIO_NUMOF-1)
150155

151156
/* GPIO channel 0 config */
152157
#define GPIO_0_PORT GPIOA /* Used for user button 1 */

‎cpu/stm32f1/periph/gpio.c

Lines changed: 41 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -315,7 +315,7 @@ int gpio_init_int(gpio_t dev, gpio_pp_t pullup, gpio_flank_t flank, gpio_cb_t cb
315315
{
316316
int res;
317317
uint8_t exti_line;
318-
uint8_t gpio_irq;
318+
int8_t gpio_irq;
319319

320320
/* configure pin as input */
321321
res = gpio_init_in(dev, pullup);
@@ -444,7 +444,7 @@ int gpio_init_int(gpio_t dev, gpio_pp_t pullup, gpio_flank_t flank, gpio_cb_t cb
444444
#if GPIO_12_EN
445445
case GPIO_12:
446446
exti_line = GPIO_12_PIN;
447-
gpio_irq = GPIO_IRQ_12;
447+
gpio_irq = GPIO_12;
448448
GPIO_12_EXTI_CFG();
449449
NVIC_SetPriority(GPIO_12_IRQ, GPIO_IRQ_PRIO);
450450
NVIC_EnableIRQ(GPIO_12_IRQ);
@@ -482,7 +482,9 @@ int gpio_init_int(gpio_t dev, gpio_pp_t pullup, gpio_flank_t flank, gpio_cb_t cb
482482
}
483483

484484
/* set callback */
485-
config[gpio_irq].cb = cb;
485+
if (gpio_irq < GPIO_NUMOF) {
486+
config[gpio_irq].cb = cb;
487+
}
486488

487489
/* configure the event that triggers an interrupt */
488490
switch (flank) {
@@ -596,8 +598,6 @@ void gpio_irq_enable(gpio_t dev)
596598
default:
597599
return;
598600
}
599-
/* save state */
600-
// int state = (EXTI->IMR & (1 << exti_line) >> exti_line);
601601

602602
/* unmask the pins interrupt channel */
603603
EXTI->IMR |= (1 << exti_line);
@@ -693,8 +693,6 @@ void gpio_irq_disable(gpio_t dev)
693693
default:
694694
return;
695695
}
696-
// /* save state */
697-
// int state = ((EXTI->IMR & (1 << exti_line)) >> exti_line);
698696

699697
/* unmask the pins interrupt channel */
700698
EXTI->IMR &= ~(1 << exti_line);
@@ -1017,13 +1015,13 @@ void gpio_write(gpio_t dev, int value)
10171015
}
10181016
}
10191017

1020-
#if GPIO_IRQ_0
1018+
#ifdef GPIO_IRQ_0
10211019
__attribute__((naked)) void isr_exti0(void)
10221020
{
10231021
ISR_ENTER();
10241022
if (EXTI->PR & EXTI_PR_PR0) {
10251023
EXTI->PR |= EXTI_PR_PR0; /* clear status bit by writing a 1 to it */
1026-
config[GPIO_0_PIN].cb(config[GPIO_0_PIN].arg);
1024+
config[GPIO_IRQ_0].cb(config[GPIO_IRQ_0].arg);
10271025
}
10281026

10291027
if (sched_context_switch_request) {
@@ -1033,13 +1031,13 @@ __attribute__((naked)) void isr_exti0(void)
10331031
}
10341032
#endif
10351033

1036-
#if GPIO_IRQ_1
1034+
#ifdef GPIO_IRQ_1
10371035
__attribute__((naked)) void isr_exti1(void)
10381036
{
10391037
ISR_ENTER();
10401038
if (EXTI->PR & EXTI_PR_PR1) {
10411039
EXTI->PR |= EXTI_PR_PR1; /* clear status bit by writing a 1 to it */
1042-
config[GPIO_1_PIN].cb(config[GPIO_1_PIN].arg);
1040+
config[GPIO_IRQ_1].cb(config[GPIO_IRQ_1].arg);
10431041
}
10441042

10451043
if (sched_context_switch_request) {
@@ -1049,13 +1047,13 @@ __attribute__((naked)) void isr_exti1(void)
10491047
}
10501048
#endif
10511049

1052-
#if GPIO_IRQ_2
1050+
#ifdef GPIO_IRQ_2
10531051
__attribute__((naked)) void isr_exti2(void)
10541052
{
10551053
ISR_ENTER();
10561054
if (EXTI->PR & EXTI_PR_PR2) {
10571055
EXTI->PR |= EXTI_PR_PR2; /* clear status bit by writing a 1 to it */
1058-
config[GPIO_2_PIN].cb(config[GPIO_2_PIN].arg);
1056+
config[GPIO_IRQ_2].cb(config[GPIO_IRQ_2].arg);
10591057
}
10601058

10611059
if (sched_context_switch_request) {
@@ -1065,13 +1063,13 @@ __attribute__((naked)) void isr_exti2(void)
10651063
}
10661064
#endif
10671065

1068-
#if GPIO_IRQ_3
1066+
#ifdef GPIO_IRQ_3
10691067
__attribute__((naked)) void isr_exti3(void)
10701068
{
10711069
ISR_ENTER();
10721070
if (EXTI->PR & EXTI_PR_PR3) {
10731071
EXTI->PR |= EXTI_PR_PR3; /* clear status bit by writing a 1 to it */
1074-
config[GPIO_3_PIN].cb(config[GPIO_3_PIN].arg);
1072+
config[GPIO_IRQ_3].cb(config[GPIO_IRQ_3].arg);
10751073
}
10761074

10771075
if (sched_context_switch_request) {
@@ -1081,13 +1079,13 @@ __attribute__((naked)) void isr_exti3(void)
10811079
}
10821080
#endif
10831081

1084-
#if GPIO_IRQ_4
1082+
#ifdef GPIO_IRQ_4
10851083
__attribute__((naked)) void isr_exti4(void)
10861084
{
10871085
ISR_ENTER();
10881086
if (EXTI->PR & EXTI_PR_PR4) {
10891087
EXTI->PR |= EXTI_PR_PR4; /* clear status bit by writing a 1 to it */
1090-
config[GPIO_4_PIN].cb(config[GPIO_4_PIN].arg);
1088+
config[GPIO_IRQ_4].cb(config[GPIO_IRQ_4].arg);
10911089
}
10921090

10931091
if (sched_context_switch_request) {
@@ -1097,88 +1095,92 @@ __attribute__((naked)) void isr_exti4(void)
10971095
}
10981096
#endif
10991097

1098+
#if defined(GPIO_IRQ_5) || defined(GPIO_IRQ_6) || defined(GPIO_IRQ_7) || defined(GPIO_IRQ_8) || defined(GPIO_IRQ_9)
11001099
__attribute__((naked)) void isr_exti9_5(void)
11011100
{
11021101
ISR_ENTER();
1103-
#if GPIO_IRQ_5
1102+
#ifdef GPIO_IRQ_5
11041103
if (EXTI->PR & EXTI_PR_PR5) {
11051104
EXTI->PR |= EXTI_PR_PR5; /* clear status bit by writing a 1 to it */
1106-
config[GPIO_5_PIN].cb(config[GPIO_5_PIN].arg);
1105+
config[GPIO_IRQ_5].cb(config[GPIO_IRQ_5].arg);
11071106
}
11081107
#endif
1109-
#if GPIO_IRQ_6
1108+
#ifdef GPIO_IRQ_6
11101109
else if (EXTI->PR & EXTI_PR_PR6) {
11111110
EXTI->PR |= EXTI_PR_PR6; /* clear status bit by writing a 1 to it */
1112-
config[GPIO_6_PIN].cb(config[GPIO_6_PIN].arg);
1111+
config[GPIO_IRQ_6].cb(config[GPIO_IRQ_6].arg);
11131112
}
11141113
#endif
1115-
#if GPIO_IRQ_7
1114+
#ifdef GPIO_IRQ_7
11161115
else if (EXTI->PR & EXTI_PR_PR7) {
11171116
EXTI->PR |= EXTI_PR_PR7; /* clear status bit by writing a 1 to it */
1118-
config[GPIO_7_PIN].cb(config[GPIO_7_PIN].arg);
1117+
config[GPIO_IRQ_7].cb(config[GPIO_IRQ_7].arg);
11191118
}
11201119
#endif
1121-
#if GPIO_IRQ_8
1120+
#ifdef GPIO_IRQ_8
11221121
else if (EXTI->PR & EXTI_PR_PR8) {
11231122
EXTI->PR |= EXTI_PR_PR8; /* clear status bit by writing a 1 to it */
1124-
config[GPIO_8_PIN].cb(config[GPIO_8_PIN].arg);
1123+
config[GPIO_IRQ_8].cb(config[GPIO_IRQ_8].arg);
11251124
}
11261125
#endif
1127-
#if GPIO_IRQ_9
1126+
#ifdef GPIO_IRQ_9
11281127
else if (EXTI->PR & EXTI_PR_PR9) {
11291128
EXTI->PR |= EXTI_PR_PR9; /* clear status bit by writing a 1 to it */
1130-
config[GPIO_9_PIN].cb(config[GPIO_9_PIN].arg);
1129+
config[GPIO_IRQ_9].cb(config[GPIO_IRQ_9].arg);
11311130
}
11321131
#endif
11331132
if (sched_context_switch_request) {
11341133
thread_yield();
11351134
}
11361135
ISR_EXIT();
11371136
}
1137+
#endif
11381138

1139+
#if defined(GPIO_IRQ_10) || defined(GPIO_IRQ_11) || defined(GPIO_IRQ_12) || defined(GPIO_IRQ_13) || defined(GPIO_IRQ_14) || defined(GPIO_IRQ_15)
11391140
__attribute__((naked)) void isr_exti15_10(void)
11401141
{
11411142
ISR_ENTER();
1142-
#if GPIO_IRQ_10
1143+
#ifdef GPIO_IRQ_10
11431144
if (EXTI->PR & EXTI_PR_PR10) {
11441145
EXTI->PR |= EXTI_PR_PR10; /* clear status bit by writing a 1 to it */
1145-
config[GPIO_10_PIN].cb(config[GPIO_10_PIN].arg);
1146+
config[GPIO_IRQ_10].cb(config[GPIO_IRQ_10].arg);
11461147
}
11471148
#endif
1148-
#if GPIO_IRQ_11
1149+
#ifdef GPIO_IRQ_11
11491150
else if (EXTI->PR & EXTI_PR_PR11) {
11501151
EXTI->PR |= EXTI_PR_PR11; /* clear status bit by writing a 1 to it */
1151-
config[GPIO_11_PIN].cb(config[GPIO_11_PIN].arg);
1152+
config[GPIO_IRQ_11].cb(config[GPIO_IRQ_11].arg);
11521153
}
11531154
#endif
1154-
#if GPIO_IRQ_12
1155+
#ifdef GPIO_IRQ_12
11551156
else if (EXTI->PR & EXTI_PR_PR12) {
11561157
EXTI->PR |= EXTI_PR_PR12; /* clear status bit by writing a 1 to it */
1157-
config[GPIO_12_PIN].cb(config[GPIO_12_PIN].arg);
1158+
config[GPIO_IRQ_12].cb(config[GPIO_IRQ_12].arg);
11581159
}
11591160
#endif
1160-
#if GPIO_IRQ_13
1161+
#ifdef GPIO_IRQ_13
11611162
else if (EXTI->PR & EXTI_PR_PR13) {
11621163
EXTI->PR |= EXTI_PR_PR13; /* clear status bit by writing a 1 to it */
1163-
config[GPIO_13_PIN].cb(config[GPIO_13_PIN].arg);
1164+
config[GPIO_IRQ_13].cb(config[GPIO_IRQ_13].arg);
11641165
}
11651166
#endif
1166-
#if GPIO_IRQ_14
1167+
#ifdef GPIO_IRQ_14
11671168
else if (EXTI->PR & EXTI_PR_PR14) {
11681169
EXTI->PR |= EXTI_PR_PR14; /* clear status bit by writing a 1 to it */
1169-
config[GPIO_14_PIN].cb(config[GPIO_14_PIN].arg);
1170+
config[GPIO_IRQ_14].cb(config[GPIO_IRQ_14].arg);
11701171
}
11711172
#endif
1172-
#if GPIO_IRQ_15
1173+
#ifdef GPIO_IRQ_15
11731174
else if (EXTI->PR & EXTI_PR_PR15) {
11741175
EXTI->PR |= EXTI_PR_PR15; /* clear status bit by writing a 1 to it */
1175-
config[GPIO_15_PIN].cb(config[GPIO_15_PIN].arg);
1176+
config[GPIO_IRQ_15].cb(config[GPIO_IRQ_15].arg);
11761177
}
11771178
#endif
11781179
if (sched_context_switch_request) {
11791180
thread_yield();
11801181
}
11811182
ISR_EXIT();
11821183
}
1184+
#endif
11831185

11841186
#endif

0 commit comments

Comments
 (0)