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PeterKietzmannPeterKietzmann
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Merge branch 'stm32f4_spi_driver' into add_nrf24l01p_lowlevel
Conflicts: boards/stm32f4discovery/include/periph_conf.h cpu/stm32f4/periph/spi.c
2 parents 83e16fe + f4ee8d1 commit 8965047

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19 files changed

+1286
-386
lines changed

19 files changed

+1286
-386
lines changed

‎boards/msba2-common/Makefile.include

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ ifeq ($(strip $(PORT)),)
2020
export PORT = /dev/ttyUSB0
2121
endif
2222
export FFLAGS = $(PORT) $(HEXFILE)
23-
export TERMFLAGS += -p "$(PORT)"
23+
export TERMFLAGS += -tg -p "$(PORT)"
2424
include $(RIOTBOARD)/msba2-common/Makefile.dep
2525

2626
export INCLUDES += -I$(RIOTBOARD)/msba2-common/include -I$(RIOTBOARD)/msba2-common/drivers/include

‎boards/stm32f0discovery/include/periph_conf.h

Lines changed: 38 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -130,6 +130,44 @@
130130
#define ADC_0_CH5_PIN 5
131131
/** @} */
132132

133+
/**
134+
* @name SPI configuration
135+
* @{
136+
*/
137+
#define SPI_NUMOF (2U)
138+
#define SPI_0_EN 1
139+
#define SPI_1_EN 1
140+
#define SPI_IRQ_PRIO 1
141+
142+
/* SPI 0 device config */
143+
#define SPI_0_DEV SPI1
144+
#define SPI_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_SPI1EN)
145+
#define SPI_0_CLKDIS() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI1EN))
146+
#define SPI_0_IRQ SPI1_IRQn
147+
#define SPI_0_ISR isr_spi1
148+
/* SPI 1 pin configuration */
149+
#define SPI_0_PORT GPIOA
150+
#define SPI_0_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOAEN)
151+
#define SPI_0_PIN_SCK 5
152+
#define SPI_0_PIN_MISO 6
153+
#define SPI_0_PIN_MOSI 7
154+
#define SPI_0_PIN_AF 0
155+
156+
/* SPI 1 device config */
157+
#define SPI_1_DEV SPI2
158+
#define SPI_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_SPI2EN)
159+
#define SPI_1_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI2EN))
160+
#define SPI_1_IRQ SPI2_IRQn
161+
#define SPI_1_ISR isr_spi2
162+
/* SPI 1 pin configuration */
163+
#define SPI_1_PORT GPIOB
164+
#define SPI_1_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOBEN)
165+
#define SPI_1_PIN_SCK 13
166+
#define SPI_1_PIN_MISO 14
167+
#define SPI_1_PIN_MOSI 15
168+
#define SPI_1_PIN_AF 0
169+
/** @} */
170+
133171
/**
134172
* @name GPIO configuration
135173
* @{

‎boards/stm32f4discovery/include/periph_conf.h

Lines changed: 38 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -194,56 +194,52 @@
194194
* @name SPI configuration
195195
* @{
196196
*/
197-
#define SPI_NUMOF 2
198-
#define SPI_0_EN 1
199-
#define SPI_1_EN 1
197+
#define SPI_NUMOF (2U)
198+
#define SPI_0_EN 1
199+
#define SPI_1_EN 1
200+
#define SPI_IRQ_PRIO 1
200201

201202
/* SPI 0 device config */
202-
#define SPI_0_DEV SPI1
203-
#define SPI_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_SPI1EN)
204-
#define SPI_0_CLKDIS() (RCC->APB2ENR &= ~RCC_APB2ENR_SPI1EN)
205-
#define SPI_0_IRQ SPI1_IRQn
206-
#define SPI_0_IRQ_HANDLER isr_spi1
207-
#define SPI_0_IRQ_PRIO 1
203+
#define SPI_0_DEV SPI1
204+
#define SPI_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_SPI1EN)
205+
#define SPI_0_CLKDIS() (RCC->APB2ENR &= ~RCC_APB2ENR_SPI1EN)
206+
#define SPI_0_IRQ SPI1_IRQn
207+
#define SPI_0_IRQ_HANDLER isr_spi1
208208
/* SPI 0 pin configuration */
209-
210-
#define SPI_0_SCK_GPIO 5
211-
#define SPI_0_MISO_GPIO 6
212-
#define SPI_0_MOSI_GPIO 7
213-
214-
#define SPI_0_SCK_PORT GPIOA
215-
#define SPI_0_MISO_PORT GPIOA
216-
#define SPI_0_MOSI_PORT GPIOA
217-
218-
#define SPI_0_SCK_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
219-
#define SPI_0_MISO_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
220-
#define SPI_0_MOSI_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
221-
209+
#define SPI_0_SCK_PORT GPIOA
210+
#define SPI_0_SCK_PIN 5
211+
#define SPI_0_SCK_AF 5
212+
#define SPI_0_SCK_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
213+
#define SPI_0_MISO_PORT GPIOA
214+
#define SPI_0_MISO_PIN 6
215+
#define SPI_0_MISO_AF 5
216+
#define SPI_0_MISO_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
217+
#define SPI_0_MOSI_PORT GPIOA
218+
#define SPI_0_MOSI_PIN 7
219+
#define SPI_0_MOSI_AF 5
220+
#define SPI_0_MOSI_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
222221

223222
/* SPI 1 device config */
224-
#define SPI_1_DEV SPI2
225-
#define SPI_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_SPI2EN)
226-
#define SPI_1_CLKDIS() (RCC->APB1ENR &= ~RCC_APB1ENR_SPI2EN)
227-
#define SPI_1_IRQ SPI2_IRQn
228-
#define SPI_1_IRQ_HANDLER isr_spi2
229-
#define SPI_1_IRQ_PRIO 1
223+
#define SPI_1_DEV SPI2
224+
#define SPI_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_SPI2EN)
225+
#define SPI_1_CLKDIS() (RCC->APB1ENR &= ~RCC_APB1ENR_SPI2EN)
226+
#define SPI_1_IRQ SPI2_IRQn
227+
#define SPI_1_IRQ_HANDLER isr_spi2
230228
/* SPI 1 pin configuration */
231-
232-
#define SPI_1_SCK_GPIO 13
233-
#define SPI_1_MISO_GPIO 14
234-
#define SPI_1_MOSI_GPIO 15
235-
236-
#define SPI_1_SCK_PORT GPIOB
237-
#define SPI_1_MISO_PORT GPIOB
238-
#define SPI_1_MOSI_PORT GPIOB
239-
240-
241-
#define SPI_1_SCK_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
242-
#define SPI_1_MISO_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
243-
#define SPI_1_MOSI_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
229+
#define SPI_1_SCK_PORT GPIOB
230+
#define SPI_1_SCK_PIN 13
231+
#define SPI_1_SCK_AF 5
232+
#define SPI_1_SCK_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
233+
#define SPI_1_MISO_PORT GPIOB
234+
#define SPI_1_MISO_PIN 14
235+
#define SPI_1_MISO_AF 5
236+
#define SPI_1_MISO_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
237+
#define SPI_1_MOSI_PORT GPIOB
238+
#define SPI_1_MOSI_PIN 15
239+
#define SPI_1_MOSI_AF 5
240+
#define SPI_1_MOSI_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
244241
/** @} */
245242

246-
247243
/**
248244
* @name I2C configuration
249245
* @{

‎core/sched.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -158,7 +158,7 @@ void sched_switch(uint16_t other_prio)
158158

159159
DEBUG("%s: %" PRIu16 " %" PRIu16 " %i\n", sched_active_thread->name, current_prio, other_prio, in_isr);
160160

161-
if (current_prio >= other_prio) {
161+
if (current_prio > other_prio) {
162162
if (in_isr) {
163163
sched_context_switch_request = 1;
164164
}

‎cpu/msp430-common/include/msp430_types.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,11 @@
1+
/*
2+
* Copyright (C) 2014 INRIA
3+
*
4+
* This file is subject to the terms and conditions of the GNU Lesser
5+
* General Public License v2.1. See the file LICENSE in the top level
6+
* directory for more details.
7+
*/
8+
19
#ifndef MSP430_TYPES_H
210
#define MSP430_TYPES_H
311

‎cpu/sam3x8e/periph/gpio.c

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -601,66 +601,82 @@ void gpio_set(gpio_t dev)
601601
#if GPIO_0_EN
602602
case GPIO_0:
603603
GPIO_0_DEV->PIO_SODR = GPIO_0_PIN;
604+
break;
604605
#endif
605606
#if GPIO_1_EN
606607
case GPIO_1:
607608
GPIO_1_DEV->PIO_SODR = GPIO_1_PIN;
609+
break;
608610
#endif
609611
#if GPIO_2_EN
610612
case GPIO_2:
611613
GPIO_2_DEV->PIO_SODR = GPIO_2_PIN;
614+
break;
612615
#endif
613616
#if GPIO_3_EN
614617
case GPIO_3:
615618
GPIO_3_DEV->PIO_SODR = GPIO_3_PIN;
619+
break;
616620
#endif
617621
#if GPIO_4_EN
618622
case GPIO_4:
619623
GPIO_4_DEV->PIO_SODR = GPIO_4_PIN;
624+
break;
620625
#endif
621626
#if GPIO_5_EN
622627
case GPIO_5:
623628
GPIO_5_DEV->PIO_SODR = GPIO_5_PIN;
629+
break;
624630
#endif
625631
#if GPIO_6_EN
626632
case GPIO_6:
627633
GPIO_6_DEV->PIO_SODR = GPIO_6_PIN;
634+
break;
628635
#endif
629636
#if GPIO_7_EN
630637
case GPIO_7:
631638
GPIO_7_DEV->PIO_SODR = GPIO_7_PIN;
639+
break;
632640
#endif
633641
#if GPIO_8_EN
634642
case GPIO_8:
635643
GPIO_8_DEV->PIO_SODR = GPIO_8_PIN;
644+
break;
636645
#endif
637646
#if GPIO_9_EN
638647
case GPIO_9:
639648
GPIO_9_DEV->PIO_SODR = GPIO_9_PIN;
649+
break;
640650
#endif
641651
#if GPIO_10_EN
642652
case GPIO_10:
643653
GPIO_10_DEV->PIO_SODR = GPIO_10_PIN;
654+
break;
644655
#endif
645656
#if GPIO_11_EN
646657
case GPIO_11:
647658
GPIO_11_DEV->PIO_SODR = GPIO_11_PIN;
659+
break;
648660
#endif
649661
#if GPIO_12_EN
650662
case GPIO_12:
651663
GPIO_12_DEV->PIO_SODR = GPIO_12_PIN;
664+
break;
652665
#endif
653666
#if GPIO_13_EN
654667
case GPIO_13:
655668
GPIO_13_DEV->PIO_SODR = GPIO_13_PIN;
669+
break;
656670
#endif
657671
#if GPIO_14_EN
658672
case GPIO_14:
659673
GPIO_14_DEV->PIO_SODR = GPIO_14_PIN;
674+
break;
660675
#endif
661676
#if GPIO_15_EN
662677
case GPIO_15:
663678
GPIO_15_DEV->PIO_SODR = GPIO_15_PIN;
679+
break;
664680
#endif
665681
}
666682
}
@@ -671,66 +687,82 @@ void gpio_clear(gpio_t dev)
671687
#if GPIO_0_EN
672688
case GPIO_0:
673689
GPIO_0_DEV->PIO_CODR = GPIO_0_PIN;
690+
break;
674691
#endif
675692
#if GPIO_1_EN
676693
case GPIO_1:
677694
GPIO_1_DEV->PIO_CODR = GPIO_1_PIN;
695+
break;
678696
#endif
679697
#if GPIO_2_EN
680698
case GPIO_2:
681699
GPIO_2_DEV->PIO_CODR = GPIO_2_PIN;
700+
break;
682701
#endif
683702
#if GPIO_3_EN
684703
case GPIO_3:
685704
GPIO_3_DEV->PIO_CODR = GPIO_3_PIN;
705+
break;
686706
#endif
687707
#if GPIO_4_EN
688708
case GPIO_4:
689709
GPIO_4_DEV->PIO_CODR = GPIO_4_PIN;
710+
break;
690711
#endif
691712
#if GPIO_5_EN
692713
case GPIO_5:
693714
GPIO_5_DEV->PIO_CODR = GPIO_5_PIN;
715+
break;
694716
#endif
695717
#if GPIO_6_EN
696718
case GPIO_6:
697719
GPIO_6_DEV->PIO_CODR = GPIO_6_PIN;
720+
break;
698721
#endif
699722
#if GPIO_7_EN
700723
case GPIO_7:
701724
GPIO_7_DEV->PIO_CODR = GPIO_7_PIN;
725+
break;
702726
#endif
703727
#if GPIO_8_EN
704728
case GPIO_8:
705729
GPIO_8_DEV->PIO_CODR = GPIO_8_PIN;
730+
break;
706731
#endif
707732
#if GPIO_9_EN
708733
case GPIO_9:
709734
GPIO_9_DEV->PIO_CODR = GPIO_9_PIN;
735+
break;
710736
#endif
711737
#if GPIO_10_EN
712738
case GPIO_10:
713739
GPIO_10_DEV->PIO_CODR = GPIO_10_PIN;
740+
break;
714741
#endif
715742
#if GPIO_11_EN
716743
case GPIO_11:
717744
GPIO_11_DEV->PIO_CODR = GPIO_11_PIN;
745+
break;
718746
#endif
719747
#if GPIO_12_EN
720748
case GPIO_12:
721749
GPIO_12_DEV->PIO_CODR = GPIO_12_PIN;
750+
break;
722751
#endif
723752
#if GPIO_13_EN
724753
case GPIO_13:
725754
GPIO_13_DEV->PIO_CODR = GPIO_13_PIN;
755+
break;
726756
#endif
727757
#if GPIO_14_EN
728758
case GPIO_14:
729759
GPIO_14_DEV->PIO_CODR = GPIO_14_PIN;
760+
break;
730761
#endif
731762
#if GPIO_15_EN
732763
case GPIO_15:
733764
GPIO_15_DEV->PIO_CODR = GPIO_15_PIN;
765+
break;
734766
#endif
735767
}
736768
}

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