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stefanlippunermaerhart
stefanlippuner
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maerhart
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Bump CIRC, fix CI build, add lifetime annotations (#252)
* Bump CIRCT * Add missing libraries Build now works with rust 1.63 (when using backtrace = "=0.3.68") * Use ninja to build llvm and circt, pin Ubuntu version in CI Uing makefiles and parallel build seems to cause errors in CI. * Add missing lifetime annotations for trait objects This caused compiler errors for rust >= 1.65 * Pin Rust toolchain version to v1.66 Newer toolchains cause stack overflow errors in some tests. That may be related to a memory alignment change in Rust v1.67 (rust-lang/rust#102750) * test: Ignore error in common_cells (broken previously), remove old IGNOREs The common_cells test was already failing as of 37f9596 The removed ignores referenced issues that have been closed and the tests pass now. --------- Co-authored-by: Martin Erhart <[email protected]>
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-48
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-48
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‎.github/build-circt.sh

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,10 +3,11 @@ set -e
33

44
mkdir -p circt/build
55
cd circt/build
6-
cmake .. \
6+
cmake -G Ninja .. \
77
-DCMAKE_BUILD_TYPE=Release \
88
-DMLIR_DIR=$PWD/../llvm/build/lib/cmake/mlir \
99
-DLLVM_DIR=$PWD/../llvm/build/lib/cmake/llvm \
1010
-DLLVM_ENABLE_ASSERTIONS=ON
1111

12-
cmake --build . -- -j$(nproc)
12+
ninja -j$(nproc)
13+

‎.github/build-llvm.sh

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@ set -e
33

44
mkdir -p circt/llvm/build
55
cd circt/llvm/build
6-
cmake ../llvm \
6+
cmake -G Ninja ../llvm \
77
-DCMAKE_BUILD_TYPE=Release \
88
-DLLVM_BUILD_EXAMPLES=OFF \
99
-DLLVM_ENABLE_ASSERTIONS=ON \
@@ -14,4 +14,4 @@ cmake ../llvm \
1414
-DLLVM_OPTIMIZED_TABLEGEN=ON \
1515
-DLLVM_TARGETS_TO_BUILD="host"
1616

17-
cmake --build . -- -j$(nproc)
17+
ninja -j$(nproc)

‎.github/workflows/ci.yml

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Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@ name: CI
55
jobs:
66
lints:
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name: Lints
8-
runs-on: ubuntu-latest
8+
runs-on: ubuntu-22.04
99
steps:
1010
- name: Checkout sources
1111
uses: actions/checkout@v2
@@ -14,7 +14,7 @@ jobs:
1414
uses: actions-rs/toolchain@v1
1515
with:
1616
profile: minimal
17-
toolchain: stable
17+
toolchain: 1.66
1818
override: true
1919
components: rustfmt, clippy
2020

@@ -32,7 +32,7 @@ jobs:
3232

3333
check:
3434
name: Checks
35-
runs-on: ubuntu-latest
35+
runs-on: ubuntu-22.04
3636
steps:
3737
- name: Checkout sources
3838
uses: actions/checkout@v2
@@ -43,7 +43,7 @@ jobs:
4343
uses: actions-rs/toolchain@v1
4444
with:
4545
profile: minimal
46-
toolchain: stable
46+
toolchain: 1.66
4747
override: true
4848
components: rustfmt, clippy
4949

@@ -64,7 +64,9 @@ jobs:
6464

6565
- name: Rebuild LLVM
6666
if: steps.cache-llvm.outputs.cache-hit != 'true'
67-
run: .github/build-llvm.sh
67+
run: |
68+
sudo apt-get install ninja-build
69+
.github/build-llvm.sh
6870
6971
- name: Upload LLVM to cache
7072
if: steps.cache-llvm.outputs.cache-hit != 'true'
@@ -83,7 +85,9 @@ jobs:
8385

8486
- name: Rebuild CIRCT
8587
if: steps.cache-circt.outputs.cache-hit != 'true'
86-
run: .github/build-circt.sh
88+
run: |
89+
sudo apt-get install ninja-build
90+
.github/build-circt.sh
8791
8892
- name: Upload CIRCT to cache
8993
if: steps.cache-circt.outputs.cache-hit != 'true'

‎circt

Submodule circt updated 1670 files

‎rust-toolchain.toml

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,3 @@
1+
[toolchain]
2+
channel = "1.66"
3+

‎src/circt-sys/build.rs

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -83,13 +83,17 @@ fn main() {
8383
"CIRCTMoore",
8484
"CIRCTSV",
8585
"CIRCTSeq",
86+
"CIRCTSupport",
8687
"LLVMBinaryFormat",
8788
"LLVMBitstreamReader",
8889
"LLVMCore",
90+
"LLVMDemangle",
8991
"LLVMRemarks",
9092
"LLVMSupport",
93+
"LLVMTargetParser",
9194
"MLIRAnalysis",
92-
"MLIRArithmeticDialect",
95+
"MLIRArithDialect",
96+
"MLIRArithValueBoundsOpInterfaceImpl",
9397
"MLIRCAPIFunc",
9498
"MLIRCAPIIR",
9599
"MLIRCAPIControlFlow",
@@ -99,6 +103,7 @@ fn main() {
99103
"MLIRFuncDialect",
100104
"MLIRIR",
101105
"MLIRInferTypeOpInterface",
106+
"MLIRInferIntRangeCommon",
102107
"MLIRInferIntRangeInterface",
103108
"MLIRPDLToPDLInterp",
104109
"MLIRParser",
@@ -108,6 +113,9 @@ fn main() {
108113
"MLIRSupport",
109114
"MLIRTransformUtils",
110115
"MLIRTransforms",
116+
"MLIRBytecodeWriter",
117+
"MLIRAsmParser",
118+
"MLIRBytecodeReader",
111119
];
112120
for name in &lib_names {
113121
println!("cargo:rustc-link-lib=static={}", name);

‎src/circt-sys/wrapper.h

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Original file line numberDiff line numberDiff line change
@@ -25,7 +25,6 @@
2525
#include "mlir-c/IR.h"
2626
#include "mlir-c/IntegerSet.h"
2727
#include "mlir-c/Pass.h"
28-
#include "mlir-c/Registration.h"
2928
#include "mlir-c/Support.h"
3029
#include "mlir-c/Transforms.h"
3130

‎src/circt/src/cf.rs

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -30,13 +30,10 @@ impl CondBranchOp {
3030
state.add_operand(condition);
3131
state.add_successor(true_dest);
3232
state.add_successor(false_dest);
33-
let vector_ty = unsafe {
34-
mlirVectorTypeGet(1, [3].as_ptr(), get_integer_type(builder.cx, 32).raw())
35-
};
36-
let vector_attr = Attribute::from_raw(unsafe {
37-
mlirDenseElementsAttrInt32Get(vector_ty, 3, [1, 0, 0].as_ptr())
33+
let dense_array_attr = Attribute::from_raw(unsafe {
34+
mlirDenseI32ArrayGet(builder.cx.raw(), 3, [1, 0, 0].as_ptr())
3835
});
39-
state.add_attribute("operand_segment_sizes", vector_attr);
36+
state.add_attribute("operand_segment_sizes", dense_array_attr);
4037
})
4138
}
4239
}

‎src/circt/src/llhd.rs

Lines changed: 8 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -229,14 +229,14 @@ impl InstanceOp {
229229
builder.build_with(|builder, state| {
230230
let num_inputs = inputs.into_iter().map(|v| state.add_operand(v)).count();
231231
let num_outputs = outputs.into_iter().map(|v| state.add_operand(v)).count();
232-
let vector_attr = Attribute::from_raw(unsafe {
233-
mlirDenseElementsAttrInt32Get(
234-
mlirVectorTypeGet(1, [2].as_ptr(), get_integer_type(builder.cx, 32).raw()),
232+
let dense_array_attr = Attribute::from_raw(unsafe {
233+
mlirDenseI32ArrayGet(
234+
builder.cx.raw(),
235235
2,
236236
[num_inputs as _, num_outputs as _].as_ptr(),
237237
)
238238
});
239-
state.add_attribute("operand_segment_sizes", vector_attr);
239+
state.add_attribute("operand_segment_sizes", dense_array_attr);
240240
state.add_attribute("name", get_string_attr(builder.cx, name));
241241
state.add_attribute("callee", get_flat_symbol_ref_attr(builder.cx, module));
242242
})
@@ -383,17 +383,14 @@ impl WaitOp {
383383
if let Some(time) = time {
384384
state.add_operand(time);
385385
}
386-
let vector_ty = unsafe {
387-
mlirVectorTypeGet(1, [3].as_ptr(), get_integer_type(builder.cx, 32).raw())
388-
};
389-
let vector_attr = Attribute::from_raw(unsafe {
390-
mlirDenseElementsAttrInt32Get(
391-
vector_ty,
386+
let dense_array_attr = Attribute::from_raw(unsafe {
387+
mlirDenseI32ArrayGet(
388+
builder.cx.raw(),
392389
3,
393390
[observed.len() as _, time.is_some() as _, 0].as_ptr(),
394391
)
395392
});
396-
state.add_attribute("operand_segment_sizes", vector_attr);
393+
state.add_attribute("operand_segment_sizes", dense_array_attr);
397394
})
398395
}
399396
}

‎src/circt/src/mlir/mod.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -96,7 +96,7 @@ pub trait OperationExt: WrapRaw<RawType = MlirOperation> {
9696
unsafe {
9797
let flags = mlirOpPrintingFlagsCreate();
9898
if with_debug_info {
99-
mlirOpPrintingFlagsEnableDebugInfo(flags, false);
99+
mlirOpPrintingFlagsEnableDebugInfo(flags, with_debug_info, false);
100100
}
101101
mlirOperationPrintWithFlags(
102102
self.raw(),

‎src/vhdl/debug.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -131,13 +131,13 @@ impl<'b, 'a, 't: 'a> Alloc<'b, 't, konst2::IntegerConst<'t>> for &'a TypeVisitor
131131
}
132132
}
133133

134-
impl<'a, 'b, 't: 'a> AllocOwned<'b, 't, konst2::Const2<'t>> for &'a TypeVisitor<'t> {
134+
impl<'a, 'b, 't: 'a> AllocOwned<'b, 't, konst2::Const2<'t> + 't> for &'a TypeVisitor<'t> {
135135
fn alloc_owned(&'b self, value: OwnedConst<'t>) -> &'t Const2<'t> {
136136
self.const_arena.alloc_owned(value)
137137
}
138138
}
139139

140-
impl<'a, 'b, 't: 'a> AllocOwned<'b, 't, ty2::Type> for &'a TypeVisitor<'t> {
140+
impl<'a, 'b, 't: 'a> AllocOwned<'b, 't, ty2::Type + 't> for &'a TypeVisitor<'t> {
141141
fn alloc_owned(&'b self, value: ty2::OwnedType<'t>) -> &'t ty2::Type {
142142
self.type_arena.alloc_owned(value)
143143
}

‎src/vhdl/hir/expr.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -29,16 +29,16 @@ pub trait Expr2<'t>: Node<'t> {
2929
pub trait ExprContext<'t>:
3030
SessionContext
3131
+ AllocInto<'t, IntegerConst<'t>>
32-
+ AllocOwnedInto<'t, Const2<'t>>
33-
+ AllocOwnedInto<'t, Type>
32+
+ AllocOwnedInto<'t, Const2<'t> + 't>
33+
+ AllocOwnedInto<'t, Type + 't>
3434
{
3535
}
3636

3737
impl<'t, T> ExprContext<'t> for T where
3838
T: SessionContext
3939
+ AllocInto<'t, IntegerConst<'t>>
40-
+ AllocOwnedInto<'t, Const2<'t>>
41-
+ AllocOwnedInto<'t, Type>
40+
+ AllocOwnedInto<'t, Const2<'t> + 't>
41+
+ AllocOwnedInto<'t, Type + 't>
4242
{
4343
}
4444

‎src/vhdl/hir/lib.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ use crate::syntax::ast;
1818
#[derive(Debug)]
1919
pub struct Library<'t> {
2020
name: Name,
21-
units: Vec<&'t LatentNode<'t, Node<'t>>>,
21+
units: Vec<&'t LatentNode<'t, Node<'t> + 't>>,
2222
scope: &'t ScopeData<'t>,
2323
}
2424

@@ -59,7 +59,7 @@ impl<'t> Library<'t> {
5959
}
6060

6161
/// Return a slice of the design units in this library.
62-
pub fn units(&self) -> &[&'t LatentNode<'t, Node<'t>>] {
62+
pub fn units(&self) -> &[&'t LatentNode<'t, Node<'t> + 't>] {
6363
&self.units
6464
}
6565

‎src/vhdl/hir/pkg.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ pub struct Package2<'t> {
1111
id: NodeId,
1212
span: Span,
1313
name: Spanned<Name>,
14-
decls: Vec<&'t LatentNode<'t, Decl2<'t>>>,
14+
decls: Vec<&'t LatentNode<'t, Decl2<'t> + 't>>,
1515
scope: &'t ScopeData<'t>,
1616
}
1717

@@ -22,7 +22,7 @@ impl<'t> Package2<'t> {
2222
}
2323

2424
/// Return the declarations made in this package.
25-
pub fn decls(&self) -> &[&'t LatentNode<'t, Decl2<'t>>] {
25+
pub fn decls(&self) -> &[&'t LatentNode<'t, Decl2<'t> + 't>] {
2626
&self.decls
2727
}
2828

‎src/vhdl/konst2/arena.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@ make_arenas!(
1313
}
1414
);
1515

16-
impl<'t> AllocOwned<'t, 't, Const2<'t>> for ConstArena<'t> {
16+
impl<'t> AllocOwned<'t, 't, Const2<'t> + 't> for ConstArena<'t> {
1717
fn alloc_owned(&'t self, value: OwnedConst<'t>) -> &'t Const2<'t> {
1818
match value {
1919
OwnedConst::Integer(k) => self.alloc(k),

‎src/vhdl/scope2.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ use crate::score::ResolvableName;
2323
#[derive(Copy, Clone)]
2424
pub enum Def2<'t> {
2525
/// Any node.
26-
Node(&'t hir::LatentNode<'t, Node<'t>>),
26+
Node(&'t hir::LatentNode<'t, Node<'t> + 't>),
2727
/// A library.
2828
Lib(&'t hir::Library<'t>),
2929
/// A package.

‎src/vhdl/ty2/arena.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ make_arenas!(
2424
}
2525
);
2626

27-
impl<'t> AllocOwned<'t, 't, Type> for TypeArena<'t> {
27+
impl<'t> AllocOwned<'t, 't, Type + 't> for TypeArena<'t> {
2828
fn alloc_owned(&'t self, value: OwnedType<'t>) -> &'t Type {
2929
match value {
3030
OwnedType::IntegerBasetype(t) => self.alloc(t),

‎test/svlog/common_cells.sv

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
// RUN: moore %s -e foo -I ../third-party/common_cells/include ../third-party/common_cells/src/*.sv
2+
// IGNORE exp_backoff results in invalid signal widths
23

34
module foo;
45
typedef int unsigned addr_t;

‎test/svlog/funcs/call_free_args.sv

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
// RUN: moore %s -e foo
2-
// IGNORE part of #168
32

43
function int bar(int a, int b);
54
return a + b;

‎test/svlog/funcs/call_free_noargs.sv

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
// RUN: moore %s -e foo
2-
// IGNORE part of #168
32

43
function int bar;
54
return 42;

‎test/svlog/funcs/default_named.sv

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
11
// RUN: moore %s -e foo
22
// Default values for named arguments from IEEE 1800-2017 section 13.5.4
3-
// IGNORE part of #213
43

54
function bar(int j = 1, int s = 0);
65
endfunction

‎test/svlog/funcs/default_pos.sv

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
11
// RUN: moore %s -e foo -Vcall-args
22
// Default values for positional arguments from IEEE 1800-2017 section 13.5.3
3-
// IGNORE part of #213
43

54
function bar(int j = 0, int k, int data = 1);
65
endfunction

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