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Fix Intel system model initializer braces
Add explicit braces around the SYS_DEV val arrays in the Intel system model table. This preserves the existing values while making the nested aggregate initialization explicit and clearing the -Wmissing-braces diagnostics.
1 parent 9b2dce5 commit ded8f7b

1 file changed

Lines changed: 108 additions & 108 deletions

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  • simulators/Intel-Systems/common

‎simulators/Intel-Systems/common/sys.c‎

Lines changed: 108 additions & 108 deletions
Original file line numberDiff line numberDiff line change
@@ -157,148 +157,148 @@ typedef struct system_model {
157157
SYS_MODEL models[SYS_NUM+1] = {
158158
{MDS_210, "MDS-210 ", 9,
159159
// id name num arg routine routine1 val1 val2 val3
160-
{{ IOC_CONT, "IOC-CONT", 1, 1, ioc_cont_cfg, ioc_cont_clr, 0xC0 },
161-
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE4, 0xE8 },
162-
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, 0xF0 },
163-
{ i8251, "I8251", 2, 1, i8251_cfg, i8251_clr, 0xF4, 0xF6 },
164-
{ i8259, "I8259", 2, 1, i8259_cfg, i8259_clr, 0xFA, 0xFC },
165-
{ IPC_CONT, "IPC-CONT", 1, 1, ipc_cont_cfg, ipc_cont_clr, 0xFF },
166-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x0FFF },
167-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x0000, 0x7FFF },
168-
{ SBC464, "SBC464", 1, 2, isbc464_cfg, isbc464_clr, 0xA800, 0x47FF }},
160+
{{ IOC_CONT, "IOC-CONT", 1, 1, ioc_cont_cfg, ioc_cont_clr, { 0xC0 } },
161+
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE4, 0xE8 } },
162+
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, { 0xF0 } },
163+
{ i8251, "I8251", 2, 1, i8251_cfg, i8251_clr, { 0xF4, 0xF6 } },
164+
{ i8259, "I8259", 2, 1, i8259_cfg, i8259_clr, { 0xFA, 0xFC } },
165+
{ IPC_CONT, "IPC-CONT", 1, 1, ipc_cont_cfg, ipc_cont_clr, { 0xFF } },
166+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x0FFF } },
167+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x0000, 0x7FFF } },
168+
{ SBC464, "SBC464", 1, 2, isbc464_cfg, isbc464_clr, { 0xA800, 0x47FF } }},
169169
},
170170
{MDS_220, "MDS-220 ", 8,
171-
{{ IOC_CONT, "IOC-CONT", 1, 1, ioc_cont_cfg, ioc_cont_clr, 0xC0 },
172-
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE4, 0xE8 },
173-
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, 0xF0 },
174-
{ i8251, "I8251", 2, 1, i8251_cfg, i8251_clr, 0xF4, 0xF6 },
175-
{ i8259, "I8259", 2, 1, i8259_cfg, i8259_clr, 0xFA, 0xFC },
176-
{ IPC_CONT, "IPC-CONT", 1, 1, ipc_cont_cfg, ipc_cont_clr, 0xFF },
177-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x0FFF },
178-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x0000, 0x7FFF }}
171+
{{ IOC_CONT, "IOC-CONT", 1, 1, ioc_cont_cfg, ioc_cont_clr, { 0xC0 } },
172+
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE4, 0xE8 } },
173+
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, { 0xF0 } },
174+
{ i8251, "I8251", 2, 1, i8251_cfg, i8251_clr, { 0xF4, 0xF6 } },
175+
{ i8259, "I8259", 2, 1, i8259_cfg, i8259_clr, { 0xFA, 0xFC } },
176+
{ IPC_CONT, "IPC-CONT", 1, 1, ipc_cont_cfg, ipc_cont_clr, { 0xFF } },
177+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x0FFF } },
178+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x0000, 0x7FFF } }}
179179
},
180180
{MDS_225, "MDS-225 ", 8,
181-
{{ IOC_CONT, "IOC-CONT", 1, 1, ioc_cont_cfg, ioc_cont_clr, 0xC0 },
182-
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE4, 0xE8 },
183-
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, 0xF0 },
184-
{ i8251, "I8251", 2, 1, i8251_cfg, i8251_clr, 0xF4, 0xF6 },
185-
{ i8259, "I8259", 2, 1, i8259_cfg, i8259_clr, 0xFA, 0xFC },
186-
{ IPC_CONT, "IPC-CONT", 1, 1, ipc_cont_cfg, ipc_cont_clr, 0xFF },
187-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x0FFF },
188-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x0000, 0xFFFF }},
181+
{{ IOC_CONT, "IOC-CONT", 1, 1, ioc_cont_cfg, ioc_cont_clr, { 0xC0 } },
182+
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE4, 0xE8 } },
183+
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, { 0xF0 } },
184+
{ i8251, "I8251", 2, 1, i8251_cfg, i8251_clr, { 0xF4, 0xF6 } },
185+
{ i8259, "I8259", 2, 1, i8259_cfg, i8259_clr, { 0xFA, 0xFC } },
186+
{ IPC_CONT, "IPC-CONT", 1, 1, ipc_cont_cfg, ipc_cont_clr, { 0xFF } },
187+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x0FFF } },
188+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x0000, 0xFFFF } }},
189189
},
190190
{MDS_230, "MDS-230 ", 9,
191-
{{ IOC_CONT, "IOC-CONT", 1, 1, ioc_cont_cfg, ioc_cont_clr, 0xC0 },
192-
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE4, 0xE8 },
193-
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, 0xF0 },
194-
{ i8251, "I8251", 2, 1, i8251_cfg, i8251_clr, 0xF4, 0xF6 },
195-
{ i8259, "I8259", 2, 1, i8259_cfg, i8259_clr, 0xFA, 0xFC },
196-
{ IPC_CONT, "IPC-CONT", 1, 1, ipc_cont_cfg, ipc_cont_clr, 0xFF },
197-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x0FFF },
198-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x0000, 0x7FFF },
199-
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, 0x8000, 0x7FFF }},
191+
{{ IOC_CONT, "IOC-CONT", 1, 1, ioc_cont_cfg, ioc_cont_clr, { 0xC0 } },
192+
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE4, 0xE8 } },
193+
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, { 0xF0 } },
194+
{ i8251, "I8251", 2, 1, i8251_cfg, i8251_clr, { 0xF4, 0xF6 } },
195+
{ i8259, "I8259", 2, 1, i8259_cfg, i8259_clr, { 0xFA, 0xFC } },
196+
{ IPC_CONT, "IPC-CONT", 1, 1, ipc_cont_cfg, ipc_cont_clr, { 0xFF } },
197+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x0FFF } },
198+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x0000, 0x7FFF } },
199+
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, { 0x8000, 0x7FFF } }},
200200
},
201201
{MDS_800, "MDS-800 ", 5,
202-
{{ i8251, "I8251", 2, 1, i8251_cfg, i8251_clr, 0xF4, 0xF6 },
203-
{ i3214, "I3214", 1, 1, i3214_cfg, i3214_clr, 0xFC },
204-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x00FF },
205-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0xF800, 0x07FF },
206-
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, 0x0000, 0xFFFF }},
202+
{{ i8251, "I8251", 2, 1, i8251_cfg, i8251_clr, { 0xF4, 0xF6 } },
203+
{ i3214, "I3214", 1, 1, i3214_cfg, i3214_clr, { 0xFC } },
204+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x00FF } },
205+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0xF800, 0x07FF } },
206+
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, { 0x0000, 0xFFFF } }},
207207
},
208208
{MDS_810, "MDS-810 ", 6,
209-
{{ i8251, "I8251", 2, 1, i8251_cfg, i8251_clr, 0xF4, 0xF6 },
210-
{ i3214, "I3214", 1, 1, i3214_cfg, i3214_clr, 0xFC },
211-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x00FF },
212-
{ EPROM, "EPROM2", 1, 2, EPROM_cfg, EPROM_clr, 0xF800, 0x07FF },
213-
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, 0x0000, 0x7FFF },
214-
{ SBC464, "SBC464", 1, 2, isbc464_cfg, isbc464_clr, 0xA800, 0x47FF }},
209+
{{ i8251, "I8251", 2, 1, i8251_cfg, i8251_clr, { 0xF4, 0xF6 } },
210+
{ i3214, "I3214", 1, 1, i3214_cfg, i3214_clr, { 0xFC } },
211+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x00FF } },
212+
{ EPROM, "EPROM2", 1, 2, EPROM_cfg, EPROM_clr, { 0xF800, 0x07FF } },
213+
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, { 0x0000, 0x7FFF } },
214+
{ SBC464, "SBC464", 1, 2, isbc464_cfg, isbc464_clr, { 0xA800, 0x47FF } }},
215215
},
216216
{SDK_80, "SDK-80 ", 4,
217-
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xEC, 0xF4 },
218-
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, 0xFA },
219-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x0FFF },
220-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x1000, 0x03FF }},
217+
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xEC, 0xF4 } },
218+
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, { 0xFA } },
219+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x0FFF } },
220+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x1000, 0x03FF } }},
221221
},
222222
{SYS_8010, "SYS-80/10 ", 4,
223-
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE4, 0xE8 },
224-
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, 0xEC },
225-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x0FFF },
226-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x3c00, 0x03FF }},
223+
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE4, 0xE8 } },
224+
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, { 0xEC } },
225+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x0FFF } },
226+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x3c00, 0x03FF } }},
227227
},
228228
{SYS_8010A, "SYS-80/10A ", 4,
229-
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE4, 0xE8 },
230-
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, 0xEC },
231-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x1FFF },
232-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x3c00, 0x03FF }},
229+
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE4, 0xE8 } },
230+
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, { 0xEC } },
231+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x1FFF } },
232+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x3c00, 0x03FF } }},
233233
},
234234
{SYS_8010B, "SYS-80/10B ", 4,
235-
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE4, 0xE8 },
236-
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, 0xEC },
237-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x1FFF },
238-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x3c00, 0x03FF }},
235+
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE4, 0xE8 } },
236+
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, { 0xEC } },
237+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x1FFF } },
238+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x3c00, 0x03FF } }},
239239
},
240240
{SYS_8020, "SYS-80/20 ", 6,
241-
{{ i8259, "I8259", 1, 1, i8259_cfg, i8259_clr, 0xDA },
242-
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, 0xDC },
243-
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE4, 0xE8 },
244-
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, 0xEC },
245-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x1FFF },
246-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x3800, 0x07FF }},
241+
{{ i8259, "I8259", 1, 1, i8259_cfg, i8259_clr, { 0xDA } },
242+
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, { 0xDC } },
243+
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE4, 0xE8 } },
244+
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, { 0xEC } },
245+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x1FFF } },
246+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x3800, 0x07FF } }},
247247
},
248248
{SYS_80204, "SYS-80/20-4 ", 6,
249-
{{ i8259, "I8259", 1, 1, i8259_cfg, i8259_clr, 0xDA },
250-
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, 0xDC },
251-
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE4, 0xE8 },
252-
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, 0xEC },
253-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x1FFF },
254-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x3000, 0x0FFF }},
249+
{{ i8259, "I8259", 1, 1, i8259_cfg, i8259_clr, { 0xDA } },
250+
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, { 0xDC } },
251+
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE4, 0xE8 } },
252+
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, { 0xEC } },
253+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x1FFF } },
254+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x3000, 0x0FFF } }},
255255
},
256256
{SYS_8024, "SYS-80/24 ", 6,
257-
{{ i8259, "I8259", 1, 1, i8259_cfg, i8259_clr, 0xDA },
258-
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, 0xDC },
259-
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE8 },
260-
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, 0xEC },
261-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x1FFF },
262-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x3c00, 0x03FF }},
257+
{{ i8259, "I8259", 1, 1, i8259_cfg, i8259_clr, { 0xDA } },
258+
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, { 0xDC } },
259+
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE8 } },
260+
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, { 0xEC } },
261+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x1FFF } },
262+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x3c00, 0x03FF } }},
263263
},
264264
{SYS_8030, "SYS-80/30 ", 6,
265-
{{ i8259, "I8259", 1, 1, i8259_cfg, i8259_clr, 0xDA },
266-
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, 0xDC },
267-
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE8 },
268-
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, 0xEC },
269-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x1FFF },
270-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x2000, 0x3FFF }},
265+
{{ i8259, "I8259", 1, 1, i8259_cfg, i8259_clr, { 0xDA } },
266+
{ i8253, "I8253", 1, 1, i8253_cfg, i8253_clr, { 0xDC } },
267+
{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE8 } },
268+
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, { 0xEC } },
269+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x1FFF } },
270+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x2000, 0x3FFF } }},
271271
},
272272
{SYS_8010_0, "SYS-80/10-0", 5,
273-
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE4, 0xE8 },
274-
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, 0xEC },
275-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x0FFF },
276-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x3c00, 0x03FF },
277-
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, 0x0000, 0xFFFF }},
273+
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE4, 0xE8 } },
274+
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, { 0xEC } },
275+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x0FFF } },
276+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x3c00, 0x03FF } },
277+
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, { 0x0000, 0xFFFF } }},
278278
},
279279
{SYS_8010_1, "SYS-80/10-1", 6,
280-
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE4, 0xE8 },
281-
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, 0xEC },
282-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x0FFF },
283-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x3c00, 0x03FF },
284-
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, 0x0000, 0xFFFF },
285-
{ SBC201, "SBC201", 1, 1, isbc201_cfg, isbc201_clr, 0x78 }},
280+
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE4, 0xE8 } },
281+
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, { 0xEC } },
282+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x0FFF } },
283+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x3c00, 0x03FF } },
284+
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, { 0x0000, 0xFFFF } },
285+
{ SBC201, "SBC201", 1, 1, isbc201_cfg, isbc201_clr, { 0x78 } }},
286286
},
287287
{SYS_8010_2, "SYS-80/10-2", 6,
288-
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE4, 0xE8 },
289-
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, 0xEC },
290-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x0FFF },
291-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x3c00, 0x03FF },
292-
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, 0x0000, 0xFFFF },
293-
{ SBC202, "SBC202", 1, 1, isbc202_cfg, isbc202_clr, 0x78 }},
288+
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE4, 0xE8 } },
289+
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, { 0xEC } },
290+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x0FFF } },
291+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x3c00, 0x03FF } },
292+
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, { 0x0000, 0xFFFF } },
293+
{ SBC202, "SBC202", 1, 1, isbc202_cfg, isbc202_clr, { 0x78 } }},
294294
},
295295
{SYS_8010_3, "SYS-80/10-3 ", 6,
296-
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, 0xE4, 0xE8 },
297-
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, 0xEC },
298-
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, 0x0000, 0x0FFF },
299-
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, 0x3c00, 0x03FF },
300-
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, 0x0000, 0xFFFF },
301-
{ SBC208, "SBC208", 1, 1, isbc208_cfg, isbc208_clr, 0x40 }},
296+
{{ i8255, "I8255", 2, 1, i8255_cfg, i8255_clr, { 0xE4, 0xE8 } },
297+
{ i8251, "I8251", 1, 1, i8251_cfg, i8251_clr, { 0xEC } },
298+
{ EPROM, "EPROM", 1, 2, EPROM_cfg, EPROM_clr, { 0x0000, 0x0FFF } },
299+
{ RAM, "RAM", 1, 2, RAM_cfg, RAM_clr, { 0x3c00, 0x03FF } },
300+
{ SBC064, "SBC064", 1, 2, isbc064_cfg, isbc064_clr, { 0x0000, 0xFFFF } },
301+
{ SBC208, "SBC208", 1, 1, isbc208_cfg, isbc208_clr, { 0x40 } }},
302302
},
303303
{0}
304304
};

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