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rustc SIGSEGV on RISC-V when compiling serde and other crates (stack overflow on 4 GB stack)

A-LLVMArea: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.

A-LTOArea: Link-time optimization (LTO)Area: Link-time optimization (LTO)

C-bugCategory: This is a bug.Category: This is a bug.

I-crashIssue: The compiler crashes (SIGSEGV, SIGABRT, etc). Use I-ICE instead when the compiler panics.Issue: The compiler crashes (SIGSEGV, SIGABRT, etc). Use I-ICE instead when the compiler panics.

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

Status: Open.

#143749 In rust-lang/rust;

· planetryan opened on Jul 10, 2025

9 comments

tests/run-make/link-eh-frame-terminator/rmake.rs recipe fails during test run for link-eh-frame-terminator on riscv64 target in x86 QEMU environment

A-run-makeArea: port run-make Makefiles to rmake.rsArea: port run-make Makefiles to rmake.rs

C-bugCategory: This is a bug.Category: This is a bug.

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#143726 In rust-lang/rust;

· CaiWeiran opened on Jul 10, 2025

std doesn't compile for riscv32gc-unknown-linux-musl

A-atomicArea: Atomics, barriers, and sync primitivesArea: Atomics, barriers, and sync primitives

C-bugCategory: This is a bug.Category: This is a bug.

O-linuxOperating system: LinuxOperating system: Linux

O-muslTarget: The musl libcTarget: The musl libc

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-libsRelevant to the library team, which will review and decide on the PR/issue.Relevant to the library team, which will review and decide on the PR/issue.

Status: Open.

#143440 In rust-lang/rust;

· Noratrieb opened on Jul 4, 2025

1 comment

riscv64gc-unknown-linux-gnu target fails some UI tests in CI

A-LLVMArea: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.

C-bugCategory: This is a bug.Category: This is a bug.

C-external-bugCategory: issue that is caused by bugs in software beyond our controlCategory: issue that is caused by bugs in software beyond our control

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#143319 In rust-lang/rust;

· CaiWeiran opened on Jul 2, 2025

8 comments

Parameter ABI inconsistency error in Rust for RISC-V

A-ABIArea: Concerning the application binary interface (ABI)Area: Concerning the application binary interface (ABI)

C-bugCategory: This is a bug.Category: This is a bug.

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#141972 In rust-lang/rust;

· YingkaiLi-VM opened on Jun 3, 2025

-Clto stack overflows with -Ccode-model=large for riscv64

A-LLVMArea: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.

A-LTOArea: Link-time optimization (LTO)Area: Link-time optimization (LTO)

C-bugCategory: This is a bug.Category: This is a bug.

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

P-lowLow priorityLow priority

regression-from-stable-to-stablePerformance or correctness regression from one stable version to another.Performance or correctness regression from one stable version to another.

S-has-mcveStatus: A Minimal Complete and Verifiable Example has been found for this issueStatus: A Minimal Complete and Verifiable Example has been found for this issue

Status: Open.

#139479 In rust-lang/rust;

· kxxt opened on Apr 7, 2025

14 comments

is_riscv_feature_detected doesn't seem to actually detect anything at runtime

A-target-featureArea: Enabling/disabling target features like AVX, Neon, etc.Area: Enabling/disabling target features like AVX, Neon, etc.

C-bugCategory: This is a bug.Category: This is a bug.

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-libsRelevant to the library team, which will review and decide on the PR/issue.Relevant to the library team, which will review and decide on the PR/issue.

Status: Open.

#139139 In rust-lang/rust;

· ThomasHabets opened on Mar 30, 2025

1

4 comments



RISC-V RVV not enabled despite -Ctarget-cpu=native

A-LLVMArea: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.

A-target-featureArea: Enabling/disabling target features like AVX, Neon, etc.Area: Enabling/disabling target features like AVX, Neon, etc.

C-bugCategory: This is a bug.Category: This is a bug.

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#138789 In rust-lang/rust;

· ThomasHabets opened on Mar 21, 2025

6 comments

RISC-V intrinsics with one or more target features are not inlined

A-LLVMArea: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.

C-bugCategory: This is a bug.Category: This is a bug.

C-optimizationCategory: An issue highlighting optimization opportunities or PRs implementing suchCategory: An issue highlighting optimization opportunities or PRs implementing such

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#137293 In rust-lang/rust;

· brkydnc opened on Feb 19, 2025

9 comments

-C force-frame-pointers=yes not respected by -Z build-std or opt-level = "z" on riscv32imc-unknown-none-elf

A-backtraceArea: BacktracesArea: Backtraces

A-LLVMArea: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.

C-bugCategory: This is a bug.Category: This is a bug.

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#136198 In rust-lang/rust;

· rslawson opened on Jan 28, 2025

14 comments

How should we handle dynamic vector ABIs?

A-ABIArea: Concerning the application binary interface (ABI)Area: Concerning the application binary interface (ABI)

A-SIMDArea: SIMD (Single Instruction Multiple Data)Area: SIMD (Single Instruction Multiple Data)

C-discussionCategory: Discussion or questions that doesn't represent real issues.Category: Discussion or questions that doesn't represent real issues.

E-needs-designThis issue needs exploration and design to see how and if we can fix/implement itThis issue needs exploration and design to see how and if we can fix/implement it

O-AArch64Armv8-A or later processors in AArch64 modeArmv8-A or later processors in AArch64 mode

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#133146 In rust-lang/rust;

· workingjubilee opened on Nov 17, 2024

Most extern "*-interrupt-*" fn should enforce 0-sized signatures

A-ABIArea: Concerning the application binary interface (ABI)Area: Concerning the application binary interface (ABI)

A-hardware-interruptsArea: Code for handling the "interrupt ABI" of various processorsArea: Code for handling the "interrupt ABI" of various processors

A-LLVMArea: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.

C-bugCategory: This is a bug.Category: This is a bug.

O-AVRTarget: AVR processors (ATtiny, ATmega, etc.)Target: AVR processors (ATtiny, ATmega, etc.)

O-msp430

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#132837 In rust-lang/rust;

· workingjubilee opened on Nov 10, 2024

3 comments

Some -Ctarget-features must be restrained on RISCV

A-ABIArea: Concerning the application binary interface (ABI)Area: Concerning the application binary interface (ABI)

A-floating-pointArea: Floating point numbers and arithmeticArea: Floating point numbers and arithmetic

C-bugCategory: This is a bug.Category: This is a bug.

E-needs-investigationCall for partcipation: This issues needs some investigation to determine current statusCall for partcipation: This issues needs some investigation to determine current status

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#132618 In rust-lang/rust;

· workingjubilee opened on Nov 4, 2024

20 comments

rustc SIGSEGV compiling rug 1.24.1 crate on RISC-V Armbian 24.5.0

C-discussionCategory: Discussion or questions that doesn't represent real issues.Category: Discussion or questions that doesn't represent real issues.

I-crashIssue: The compiler crashes (SIGSEGV, SIGABRT, etc). Use I-ICE instead when the compiler panics.Issue: The compiler crashes (SIGSEGV, SIGABRT, etc). Use I-ICE instead when the compiler panics.

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

Status: Open.

#127180 In rust-lang/rust;

· mathsDOTearth opened on Jun 30, 2024

4 comments

asm! should actually understand "can you address this register?"

A-inline-assemblyArea: Inline assembly (`asm!(…)`)Area: Inline assembly (`asm!(…)`)

C-cleanupCategory: PRs that clean code up or issues documenting cleanup.Category: PRs that clean code up or issues documenting cleanup.

O-AArch64Armv8-A or later processors in AArch64 modeArmv8-A or later processors in AArch64 mode

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

T-libsRelevant to the library team, which will review and decide on the PR/issue.Relevant to the library team, which will review and decide on the PR/issue.

Status: Open.

#126890 In rust-lang/rust;

· workingjubilee opened on Jun 24, 2024

error: Error loading target specification: Could not find specification for target "riscv64-unknown-linux-gnu".

A-targetsArea: Concerning the implications of different compiler targetsArea: Concerning the implications of different compiler targets

C-discussionCategory: Discussion or questions that doesn't represent real issues.Category: Discussion or questions that doesn't represent real issues.

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#123161 In rust-lang/rust;

· andreas-schwab opened on Mar 28, 2024

24 comments

Unable to compile rust for riscv32imc-unknown-none-elf with clang 19.0.0git

C-bugCategory: This is a bug.Category: This is a bug.

E-needs-testCall for participation: An issue has been fixed and does not reproduce, but no test has been added.Call for participation: An issue has been fixed and does not reproduce, but no test has been added.

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-bootstrapRelevant to the bootstrap subteam: Rust's build system (x.py and src/bootstrap)Relevant to the bootstrap subteam: Rust's build system (x.py and src/bootstrap)

Status: Open.

#121371 In rust-lang/rust;

· erickt opened on Feb 21, 2024

4 comments

libcore on riscv64gc-unknown-none-elf contains problematic .sdata section

A-LLVMArea: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.

C-bugCategory: This is a bug.Category: This is a bug.

I-heavyIssue: Problems and improvements with respect to binary size of generated code.Issue: Problems and improvements with respect to binary size of generated code.

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

Status: Open.

#120685 In rust-lang/rust;

· dreiss opened on Feb 5, 2024

4 comments

riscv64-unknown-freebsd patches backtrace support out

O-freebsdOperating system: FreeBSDOperating system: FreeBSD

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#117183 In rust-lang/rust;

· estebank opened on Oct 25, 2023

1 comment

The sparc64, riscv64, loongarch64 extern "C" fn ABIs are all wrong when aligned/packed structs are involved

A-ABIArea: Concerning the application binary interface (ABI)Area: Concerning the application binary interface (ABI)

A-FFIArea: Foreign function interface (FFI)Area: Foreign function interface (FFI)

I-unsoundIssue: A soundness hole (worst kind of bug), see: https://en.wikipedia.org/wiki/SoundnessIssue: A soundness hole (worst kind of bug), see: https://en.wikipedia.org/wiki/Soundness

O-loongarchTarget: LoongArch (LA32R, LA32S, LA64)Target: LoongArch (LA32R, LA32S, LA64)

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

O-SPARCTarget: SPARC processorsTarget: SPARC processors

P-mediumMedium priorityMedium priority

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#115609 In rust-lang/rust;

· RalfJung opened on Sep 6, 2023

24 comments

Tracking Issue for RISC-V Ratified Extensions Intrinsics

A-floating-pointArea: Floating point numbers and arithmeticArea: Floating point numbers and arithmetic

A-SIMDArea: SIMD (Single Instruction Multiple Data)Area: SIMD (Single Instruction Multiple Data)

A-target-featureArea: Enabling/disabling target features like AVX, Neon, etc.Area: Enabling/disabling target features like AVX, Neon, etc.

C-tracking-issueCategory: An issue tracking the progress of sth. like the implementation of an RFCCategory: An issue tracking the progress of sth. like the implementation of an RFC

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-libs-apiRelevant to the library API team, which will review and decide on the PR/issue.Relevant to the library API team, which will review and decide on the PR/issue.

Status: Open.

#114544 In rust-lang/rust;

· coastalwhite opened on Aug 6, 2023

3 comments

Suboptimal dual-exit code gen on RISC-V

A-codegenArea: Code generationArea: Code generation

C-bugCategory: This is a bug.Category: This is a bug.

I-slowIssue: Problems and improvements with respect to performance of generated code.Issue: Problems and improvements with respect to performance of generated code.

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#113346 In rust-lang/rust;

· tommythorn opened on Jul 4, 2023

liballoc built with -Csplit-debuginfo=unpacked despite not being supported on riscv32imc-unknown-none-elf

A-debuginfoArea: Debugging information in compiled programs (DWARF, PDB, etc.)Area: Debugging information in compiled programs (DWARF, PDB, etc.)

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-bootstrapRelevant to the bootstrap subteam: Rust's build system (x.py and src/bootstrap)Relevant to the bootstrap subteam: Rust's build system (x.py and src/bootstrap)

Status: Open.

#112406 In rust-lang/rust;

· tmandry opened on Jun 7, 2023

1 comment

Tracking Issue for riscv-interrupt-{m,s} ABIs

A-ABIArea: Concerning the application binary interface (ABI)Area: Concerning the application binary interface (ABI)

A-hardware-interruptsArea: Code for handling the "interrupt ABI" of various processorsArea: Code for handling the "interrupt ABI" of various processors

C-tracking-issueCategory: An issue tracking the progress of sth. like the implementation of an RFCCategory: An issue tracking the progress of sth. like the implementation of an RFC

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

S-tracking-needs-documentationStatus: Needs documentation.Status: Needs documentation.

S-tracking-needs-summaryStatus: It's hard to tell what's been done and what hasn't! Someone should do some investigation.Status: It's hard to tell what's been done and what hasn't! Someone should do some investigation.

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#111889 In rust-lang/rust;

· sethp opened on May 23, 2023

1 comment

Compilation error about RISC-V H extension

C-bugCategory: This is a bug.Category: This is a bug.

O-riscvTarget: RISC-V architectureTarget: RISC-V architecture

T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.

Status: Open.

#111637 In rust-lang/rust;

· KuangjuX opened on May 16, 2023

13 comments