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Commit a143355

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authoredFeb 25, 2022
Remove external assembly (#343)
1 parent 3d32678 commit a143355

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17 files changed

+26
-996
lines changed

17 files changed

+26
-996
lines changed
 

‎Cargo.toml

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -30,19 +30,18 @@ bit_field = "0.10.1"
3030
bitflags = "1.0.4"
3131
volatile = "0.4.4"
3232

33-
[build-dependencies]
34-
cc = { version = "1.0.37", optional = true }
35-
3633
[features]
3734
default = [ "nightly", "instructions" ]
3835
instructions = []
39-
external_asm = [ "cc" ]
40-
nightly = [ "inline_asm", "const_fn", "abi_x86_interrupt", "doc_cfg" ]
41-
inline_asm = []
36+
nightly = [ "const_fn", "abi_x86_interrupt", "doc_cfg" ]
4237
abi_x86_interrupt = []
4338
const_fn = []
4439
doc_cfg = []
4540

41+
# These features are no longer used and only there for backwards compatibility.
42+
external_asm = []
43+
inline_asm = []
44+
4645
[package.metadata.release]
4746
no-dev-version = true
4847
pre-release-replacements = [

‎build.rs

Lines changed: 0 additions & 54 deletions
This file was deleted.

‎src/asm/asm.s

Lines changed: 0 additions & 352 deletions
This file was deleted.

‎src/asm/mod.rs

Lines changed: 0 additions & 314 deletions
This file was deleted.

‎src/instructions/interrupts.rs

Lines changed: 0 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
11
//! Enabling and disabling interrupts
22
3-
#[cfg(feature = "inline_asm")]
43
use core::arch::asm;
54

65
/// Returns whether interrupts are enabled.
@@ -17,11 +16,7 @@ pub fn are_enabled() -> bool {
1716
#[inline]
1817
pub fn enable() {
1918
unsafe {
20-
#[cfg(feature = "inline_asm")]
2119
asm!("sti", options(nomem, nostack));
22-
23-
#[cfg(not(feature = "inline_asm"))]
24-
crate::asm::x86_64_asm_interrupt_enable();
2520
}
2621
}
2722

@@ -31,11 +26,7 @@ pub fn enable() {
3126
#[inline]
3227
pub fn disable() {
3328
unsafe {
34-
#[cfg(feature = "inline_asm")]
3529
asm!("cli", options(nomem, nostack));
36-
37-
#[cfg(not(feature = "inline_asm"))]
38-
crate::asm::x86_64_asm_interrupt_disable();
3930
}
4031
}
4132

@@ -130,23 +121,15 @@ where
130121
#[inline]
131122
pub fn enable_and_hlt() {
132123
unsafe {
133-
#[cfg(feature = "inline_asm")]
134124
asm!("sti; hlt", options(nomem, nostack));
135-
136-
#[cfg(not(feature = "inline_asm"))]
137-
crate::asm::x86_64_asm_interrupt_enable_and_hlt();
138125
}
139126
}
140127

141128
/// Cause a breakpoint exception by invoking the `int3` instruction.
142129
#[inline]
143130
pub fn int3() {
144131
unsafe {
145-
#[cfg(feature = "inline_asm")]
146132
asm!("int3", options(nomem, nostack));
147-
148-
#[cfg(not(feature = "inline_asm"))]
149-
crate::asm::x86_64_asm_int3();
150133
}
151134
}
152135

@@ -155,11 +138,6 @@ pub fn int3() {
155138
/// This currently needs to be a macro because the `int` argument needs to be an
156139
/// immediate. This macro will be replaced by a generic function when support for
157140
/// const generics is implemented in Rust.
158-
#[cfg(feature = "inline_asm")]
159-
#[cfg_attr(
160-
feature = "doc_cfg",
161-
doc(cfg(any(feature = "nightly", feature = "inline_asm")))
162-
)]
163141
#[macro_export]
164142
macro_rules! software_interrupt {
165143
($x:expr) => {{

‎src/instructions/mod.rs

Lines changed: 0 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -9,18 +9,13 @@ pub mod segmentation;
99
pub mod tables;
1010
pub mod tlb;
1111

12-
#[cfg(feature = "inline_asm")]
1312
use core::arch::asm;
1413

1514
/// Halts the CPU until the next interrupt arrives.
1615
#[inline]
1716
pub fn hlt() {
1817
unsafe {
19-
#[cfg(feature = "inline_asm")]
2018
asm!("hlt", options(nomem, nostack, preserves_flags));
21-
22-
#[cfg(not(feature = "inline_asm"))]
23-
crate::asm::x86_64_asm_hlt();
2419
}
2520
}
2621

@@ -33,11 +28,7 @@ pub fn hlt() {
3328
#[inline]
3429
pub fn nop() {
3530
unsafe {
36-
#[cfg(feature = "inline_asm")]
3731
asm!("nop", options(nomem, nostack, preserves_flags));
38-
39-
#[cfg(not(feature = "inline_asm"))]
40-
crate::asm::x86_64_asm_nop();
4132
}
4233
}
4334

@@ -46,21 +37,12 @@ pub fn nop() {
4637
#[inline]
4738
pub fn bochs_breakpoint() {
4839
unsafe {
49-
#[cfg(feature = "inline_asm")]
5040
asm!("xchg bx, bx", options(nomem, nostack, preserves_flags));
51-
52-
#[cfg(not(feature = "inline_asm"))]
53-
crate::asm::x86_64_asm_bochs();
5441
}
5542
}
5643

5744
/// Gets the current instruction pointer. Note that this is only approximate as it requires a few
5845
/// instructions to execute.
59-
#[cfg(feature = "inline_asm")]
60-
#[cfg_attr(
61-
feature = "doc_cfg",
62-
doc(cfg(any(feature = "nightly", feature = "inline_asm")))
63-
)]
6446
#[inline(always)]
6547
pub fn read_rip() -> crate::VirtAddr {
6648
let rip: u64;

‎src/instructions/port.rs

Lines changed: 9 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
11
//! Access to I/O ports
22
3-
#[cfg(feature = "inline_asm")]
43
use core::arch::asm;
54
use core::fmt;
65
use core::marker::PhantomData;
@@ -10,99 +9,60 @@ pub use crate::structures::port::{PortRead, PortWrite};
109
impl PortRead for u8 {
1110
#[inline]
1211
unsafe fn read_from_port(port: u16) -> u8 {
13-
#[cfg(feature = "inline_asm")]
14-
{
15-
let value: u8;
16-
unsafe {
17-
asm!("in al, dx", out("al") value, in("dx") port, options(nomem, nostack, preserves_flags));
18-
}
19-
value
20-
}
21-
#[cfg(not(feature = "inline_asm"))]
12+
let value: u8;
2213
unsafe {
23-
crate::asm::x86_64_asm_read_from_port_u8(port)
14+
asm!("in al, dx", out("al") value, in("dx") port, options(nomem, nostack, preserves_flags));
2415
}
16+
value
2517
}
2618
}
2719

2820
impl PortRead for u16 {
2921
#[inline]
3022
unsafe fn read_from_port(port: u16) -> u16 {
31-
#[cfg(feature = "inline_asm")]
32-
{
33-
let value: u16;
34-
unsafe {
35-
asm!("in ax, dx", out("ax") value, in("dx") port, options(nomem, nostack, preserves_flags));
36-
}
37-
value
38-
}
39-
#[cfg(not(feature = "inline_asm"))]
23+
let value: u16;
4024
unsafe {
41-
crate::asm::x86_64_asm_read_from_port_u16(port)
25+
asm!("in ax, dx", out("ax") value, in("dx") port, options(nomem, nostack, preserves_flags));
4226
}
27+
value
4328
}
4429
}
4530

4631
impl PortRead for u32 {
4732
#[inline]
4833
unsafe fn read_from_port(port: u16) -> u32 {
49-
#[cfg(feature = "inline_asm")]
50-
{
51-
let value: u32;
52-
unsafe {
53-
asm!("in eax, dx", out("eax") value, in("dx") port, options(nomem, nostack, preserves_flags));
54-
}
55-
value
56-
}
57-
#[cfg(not(feature = "inline_asm"))]
34+
let value: u32;
5835
unsafe {
59-
crate::asm::x86_64_asm_read_from_port_u32(port)
36+
asm!("in eax, dx", out("eax") value, in("dx") port, options(nomem, nostack, preserves_flags));
6037
}
38+
value
6139
}
6240
}
6341

6442
impl PortWrite for u8 {
6543
#[inline]
6644
unsafe fn write_to_port(port: u16, value: u8) {
67-
#[cfg(feature = "inline_asm")]
6845
unsafe {
6946
asm!("out dx, al", in("dx") port, in("al") value, options(nomem, nostack, preserves_flags));
7047
}
71-
72-
#[cfg(not(feature = "inline_asm"))]
73-
unsafe {
74-
crate::asm::x86_64_asm_write_to_port_u8(port, value);
75-
}
7648
}
7749
}
7850

7951
impl PortWrite for u16 {
8052
#[inline]
8153
unsafe fn write_to_port(port: u16, value: u16) {
82-
#[cfg(feature = "inline_asm")]
8354
unsafe {
8455
asm!("out dx, ax", in("dx") port, in("ax") value, options(nomem, nostack, preserves_flags));
8556
}
86-
87-
#[cfg(not(feature = "inline_asm"))]
88-
unsafe {
89-
crate::asm::x86_64_asm_write_to_port_u16(port, value);
90-
}
9157
}
9258
}
9359

9460
impl PortWrite for u32 {
9561
#[inline]
9662
unsafe fn write_to_port(port: u16, value: u32) {
97-
#[cfg(feature = "inline_asm")]
9863
unsafe {
9964
asm!("out dx, eax", in("dx") port, in("eax") value, options(nomem, nostack, preserves_flags));
10065
}
101-
102-
#[cfg(not(feature = "inline_asm"))]
103-
unsafe {
104-
crate::asm::x86_64_asm_write_to_port_u32(port, value);
105-
}
10666
}
10767
}
10868

‎src/instructions/segmentation.rs

Lines changed: 0 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -6,21 +6,15 @@ use crate::{
66
structures::gdt::SegmentSelector,
77
VirtAddr,
88
};
9-
#[cfg(feature = "inline_asm")]
109
use core::arch::asm;
1110

1211
macro_rules! get_reg_impl {
1312
($name:literal, $asm_get:ident) => {
1413
fn get_reg() -> SegmentSelector {
1514
let segment: u16;
16-
#[cfg(feature = "inline_asm")]
1715
unsafe {
1816
asm!(concat!("mov {0:x}, ", $name), out(reg) segment, options(nomem, nostack, preserves_flags));
1917
}
20-
#[cfg(not(feature = "inline_asm"))]
21-
unsafe {
22-
segment = crate::asm::$asm_get();
23-
}
2418
SegmentSelector(segment)
2519
}
2620
};
@@ -32,15 +26,9 @@ macro_rules! segment_impl {
3226
get_reg_impl!($name, $asm_get);
3327

3428
unsafe fn set_reg(sel: SegmentSelector) {
35-
#[cfg(feature = "inline_asm")]
3629
unsafe {
3730
asm!(concat!("mov ", $name, ", {0:x}"), in(reg) sel.0, options(nostack, preserves_flags));
3831
}
39-
40-
#[cfg(not(feature = "inline_asm"))]
41-
unsafe{
42-
crate::asm::$asm_load(sel.0);
43-
}
4432
}
4533
}
4634
};
@@ -51,28 +39,17 @@ macro_rules! segment64_impl {
5139
impl Segment64 for $type {
5240
const BASE: Msr = <$base>::MSR;
5341
fn read_base() -> VirtAddr {
54-
#[cfg(feature = "inline_asm")]
5542
unsafe {
5643
let val: u64;
5744
asm!(concat!("rd", $name, "base {}"), out(reg) val, options(nomem, nostack, preserves_flags));
5845
VirtAddr::new_unsafe(val)
5946
}
60-
#[cfg(not(feature = "inline_asm"))]
61-
unsafe {
62-
VirtAddr::new_unsafe(crate::asm::$asm_rd())
63-
}
6447
}
6548

6649
unsafe fn write_base(base: VirtAddr) {
67-
#[cfg(feature = "inline_asm")]
6850
unsafe{
6951
asm!(concat!("wr", $name, "base {}"), in(reg) base.as_u64(), options(nostack, preserves_flags));
7052
}
71-
72-
#[cfg(not(feature = "inline_asm"))]
73-
unsafe{
74-
crate::asm::$asm_wr(base.as_u64());
75-
}
7653
}
7754
}
7855
};
@@ -90,7 +67,6 @@ impl Segment for CS {
9067
/// would only be able to jump to 32-bit instruction pointers. Only Intel implements support
9168
/// for 64-bit far calls/jumps in long-mode, AMD does not.
9269
unsafe fn set_reg(sel: SegmentSelector) {
93-
#[cfg(feature = "inline_asm")]
9470
unsafe {
9571
asm!(
9672
"push {sel}",
@@ -103,11 +79,6 @@ impl Segment for CS {
10379
options(preserves_flags),
10480
);
10581
}
106-
107-
#[cfg(not(feature = "inline_asm"))]
108-
unsafe {
109-
crate::asm::x86_64_asm_set_cs(u64::from(sel.0));
110-
}
11182
}
11283
}
11384

@@ -127,15 +98,9 @@ impl GS {
12798
/// This function is unsafe because the caller must ensure that the
12899
/// swap operation cannot lead to undefined behavior.
129100
pub unsafe fn swap() {
130-
#[cfg(feature = "inline_asm")]
131101
unsafe {
132102
asm!("swapgs", options(nostack, preserves_flags));
133103
}
134-
135-
#[cfg(not(feature = "inline_asm"))]
136-
unsafe {
137-
crate::asm::x86_64_asm_swapgs();
138-
}
139104
}
140105
}
141106

‎src/instructions/tables.rs

Lines changed: 0 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,6 @@
22
33
use crate::structures::gdt::SegmentSelector;
44
use crate::VirtAddr;
5-
#[cfg(feature = "inline_asm")]
65
use core::arch::asm;
76

87
pub use crate::structures::DescriptorTablePointer;
@@ -20,15 +19,9 @@ pub use crate::structures::DescriptorTablePointer;
2019
/// GDT is safe.
2120
#[inline]
2221
pub unsafe fn lgdt(gdt: &DescriptorTablePointer) {
23-
#[cfg(feature = "inline_asm")]
2422
unsafe {
2523
asm!("lgdt [{}]", in(reg) gdt, options(readonly, nostack, preserves_flags));
2624
}
27-
28-
#[cfg(not(feature = "inline_asm"))]
29-
unsafe {
30-
crate::asm::x86_64_asm_lgdt(gdt as *const _);
31-
}
3225
}
3326

3427
/// Load an IDT.
@@ -44,15 +37,9 @@ pub unsafe fn lgdt(gdt: &DescriptorTablePointer) {
4437
/// IDT is safe.
4538
#[inline]
4639
pub unsafe fn lidt(idt: &DescriptorTablePointer) {
47-
#[cfg(feature = "inline_asm")]
4840
unsafe {
4941
asm!("lidt [{}]", in(reg) idt, options(readonly, nostack, preserves_flags));
5042
}
51-
52-
#[cfg(not(feature = "inline_asm"))]
53-
unsafe {
54-
crate::asm::x86_64_asm_lidt(idt as *const _);
55-
}
5643
}
5744

5845
/// Get the address of the current GDT.
@@ -63,11 +50,7 @@ pub fn sgdt() -> DescriptorTablePointer {
6350
base: VirtAddr::new(0),
6451
};
6552
unsafe {
66-
#[cfg(feature = "inline_asm")]
6753
asm!("sgdt [{}]", in(reg) &mut gdt, options(nostack, preserves_flags));
68-
69-
#[cfg(not(feature = "inline_asm"))]
70-
crate::asm::x86_64_asm_sgdt(&mut gdt as *mut _);
7154
}
7255
gdt
7356
}
@@ -80,11 +63,7 @@ pub fn sidt() -> DescriptorTablePointer {
8063
base: VirtAddr::new(0),
8164
};
8265
unsafe {
83-
#[cfg(feature = "inline_asm")]
8466
asm!("sidt [{}]", in(reg) &mut idt, options(nostack, preserves_flags));
85-
86-
#[cfg(not(feature = "inline_asm"))]
87-
crate::asm::x86_64_asm_sidt(&mut idt as *mut _);
8867
}
8968
idt
9069
}
@@ -98,13 +77,7 @@ pub fn sidt() -> DescriptorTablePointer {
9877
/// this TSS is safe.
9978
#[inline]
10079
pub unsafe fn load_tss(sel: SegmentSelector) {
101-
#[cfg(feature = "inline_asm")]
10280
unsafe {
10381
asm!("ltr {0:x}", in(reg) sel.0, options(nomem, nostack, preserves_flags));
10482
}
105-
106-
#[cfg(not(feature = "inline_asm"))]
107-
unsafe {
108-
crate::asm::x86_64_asm_ltr(sel.0);
109-
}
11083
}

‎src/instructions/tlb.rs

Lines changed: 0 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,13 @@
11
//! Functions to flush the translation lookaside buffer (TLB).
22
33
use crate::VirtAddr;
4-
#[cfg(feature = "inline_asm")]
54
use core::arch::asm;
65

76
/// Invalidate the given address in the TLB using the `invlpg` instruction.
87
#[inline]
98
pub fn flush(addr: VirtAddr) {
109
unsafe {
11-
#[cfg(feature = "inline_asm")]
1210
asm!("invlpg [{}]", in(reg) addr.as_u64(), options(nostack, preserves_flags));
13-
14-
#[cfg(not(feature = "inline_asm"))]
15-
crate::asm::x86_64_asm_invlpg(addr.as_u64());
1611
}
1712
}
1813

@@ -98,13 +93,7 @@ pub unsafe fn flush_pcid(command: InvPicdCommand) {
9893
InvPicdCommand::AllExceptGlobal => kind = 3,
9994
}
10095

101-
#[cfg(feature = "inline_asm")]
10296
unsafe {
10397
asm!("invpcid {0}, [{1}]", in(reg) kind, in(reg) &desc, options(nostack, preserves_flags));
10498
}
105-
106-
#[cfg(not(feature = "inline_asm"))]
107-
unsafe {
108-
crate::asm::x86_64_asm_invpcid(kind, &desc as *const _ as u64);
109-
}
11099
}

‎src/lib.rs

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,6 @@
55
#![cfg_attr(feature = "const_fn", feature(const_mut_refs))] // GDT add_entry()
66
#![cfg_attr(feature = "const_fn", feature(const_fn_fn_ptr_basics))] // IDT new()
77
#![cfg_attr(feature = "const_fn", feature(const_fn_trait_bound))] // PageSize marker trait
8-
#![cfg_attr(feature = "inline_asm", feature(asm))]
98
#![cfg_attr(feature = "abi_x86_interrupt", feature(abi_x86_interrupt))]
109
#![cfg_attr(feature = "doc_cfg", feature(doc_cfg))]
1110
#![warn(missing_docs)]
@@ -45,9 +44,6 @@ macro_rules! const_fn {
4544
};
4645
}
4746

48-
#[cfg(all(feature = "instructions", feature = "external_asm"))]
49-
pub(crate) mod asm;
50-
5147
pub mod addr;
5248
pub mod instructions;
5349
pub mod registers;

‎src/registers/control.rs

Lines changed: 0 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -161,7 +161,6 @@ bitflags! {
161161
mod x86_64 {
162162
use super::*;
163163
use crate::{instructions::tlb::Pcid, structures::paging::PhysFrame, PhysAddr, VirtAddr};
164-
#[cfg(feature = "inline_asm")]
165164
use core::arch::asm;
166165

167166
impl Cr0 {
@@ -176,14 +175,9 @@ mod x86_64 {
176175
pub fn read_raw() -> u64 {
177176
let value: u64;
178177

179-
#[cfg(feature = "inline_asm")]
180178
unsafe {
181179
asm!("mov {}, cr0", out(reg) value, options(nomem, nostack, preserves_flags));
182180
}
183-
#[cfg(not(feature = "inline_asm"))]
184-
unsafe {
185-
value = crate::asm::x86_64_asm_read_cr0();
186-
}
187181

188182
value
189183
}
@@ -217,15 +211,9 @@ mod x86_64 {
217211
/// safety through it, e.g. by disabling paging.
218212
#[inline]
219213
pub unsafe fn write_raw(value: u64) {
220-
#[cfg(feature = "inline_asm")]
221214
unsafe {
222215
asm!("mov cr0, {}", in(reg) value, options(nostack, preserves_flags));
223216
}
224-
225-
#[cfg(not(feature = "inline_asm"))]
226-
unsafe {
227-
crate::asm::x86_64_asm_write_cr0(value);
228-
}
229217
}
230218

231219
/// Updates CR0 flags.
@@ -261,14 +249,9 @@ mod x86_64 {
261249
pub fn read_raw() -> u64 {
262250
let value: u64;
263251

264-
#[cfg(feature = "inline_asm")]
265252
unsafe {
266253
asm!("mov {}, cr2", out(reg) value, options(nomem, nostack, preserves_flags));
267254
}
268-
#[cfg(not(feature = "inline_asm"))]
269-
unsafe {
270-
value = crate::asm::x86_64_asm_read_cr2();
271-
}
272255

273256
value
274257
}
@@ -288,14 +271,9 @@ mod x86_64 {
288271
pub fn read_raw() -> (PhysFrame, u16) {
289272
let value: u64;
290273

291-
#[cfg(feature = "inline_asm")]
292274
unsafe {
293275
asm!("mov {}, cr3", out(reg) value, options(nomem, nostack, preserves_flags));
294276
}
295-
#[cfg(not(feature = "inline_asm"))]
296-
unsafe {
297-
value = crate::asm::x86_64_asm_read_cr3();
298-
}
299277

300278
let addr = PhysAddr::new(value & 0x_000f_ffff_ffff_f000);
301279
let frame = PhysFrame::containing_address(addr);
@@ -349,15 +327,9 @@ mod x86_64 {
349327
let addr = frame.start_address();
350328
let value = addr.as_u64() | val as u64;
351329

352-
#[cfg(feature = "inline_asm")]
353330
unsafe {
354331
asm!("mov cr3, {}", in(reg) value, options(nostack, preserves_flags));
355332
}
356-
357-
#[cfg(not(feature = "inline_asm"))]
358-
unsafe {
359-
crate::asm::x86_64_asm_write_cr3(value)
360-
}
361333
}
362334
}
363335

@@ -373,14 +345,9 @@ mod x86_64 {
373345
pub fn read_raw() -> u64 {
374346
let value: u64;
375347

376-
#[cfg(feature = "inline_asm")]
377348
unsafe {
378349
asm!("mov {}, cr4", out(reg) value, options(nomem, nostack, preserves_flags));
379350
}
380-
#[cfg(not(feature = "inline_asm"))]
381-
unsafe {
382-
value = crate::asm::x86_64_asm_read_cr4();
383-
}
384351

385352
value
386353
}
@@ -416,15 +383,9 @@ mod x86_64 {
416383
/// flag.
417384
#[inline]
418385
pub unsafe fn write_raw(value: u64) {
419-
#[cfg(feature = "inline_asm")]
420386
unsafe {
421387
asm!("mov cr4, {}", in(reg) value, options(nostack, preserves_flags));
422388
}
423-
424-
#[cfg(not(feature = "inline_asm"))]
425-
unsafe {
426-
crate::asm::x86_64_asm_write_cr4(value);
427-
}
428389
}
429390

430391
/// Updates CR4 flags.

‎src/registers/mod.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,5 +11,5 @@ pub mod xcontrol;
1111
#[allow(deprecated)]
1212
pub use crate::instructions::segmentation::{rdfsbase, rdgsbase, wrfsbase, wrgsbase};
1313

14-
#[cfg(all(feature = "instructions", feature = "inline_asm"))]
14+
#[cfg(feature = "instructions")]
1515
pub use crate::instructions::read_rip;

‎src/registers/model_specific.rs

Lines changed: 8 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -127,7 +127,6 @@ mod x86_64 {
127127
control::Cr4Flags,
128128
segmentation::{Segment, Segment64, CS, SS},
129129
};
130-
#[cfg(feature = "inline_asm")]
131130
use core::arch::asm;
132131

133132
impl Msr {
@@ -139,24 +138,16 @@ mod x86_64 {
139138
/// effects.
140139
#[inline]
141140
pub unsafe fn read(&self) -> u64 {
142-
#[cfg(feature = "inline_asm")]
143-
{
144-
let (high, low): (u32, u32);
145-
unsafe {
146-
asm!(
147-
"rdmsr",
148-
in("ecx") self.0,
149-
out("eax") low, out("edx") high,
150-
options(nomem, nostack, preserves_flags),
151-
);
152-
}
153-
((high as u64) << 32) | (low as u64)
154-
}
155-
156-
#[cfg(not(feature = "inline_asm"))]
141+
let (high, low): (u32, u32);
157142
unsafe {
158-
crate::asm::x86_64_asm_rdmsr(self.0)
143+
asm!(
144+
"rdmsr",
145+
in("ecx") self.0,
146+
out("eax") low, out("edx") high,
147+
options(nomem, nostack, preserves_flags),
148+
);
159149
}
150+
((high as u64) << 32) | (low as u64)
160151
}
161152

162153
/// Write 64 bits to msr register.
@@ -170,7 +161,6 @@ mod x86_64 {
170161
let low = value as u32;
171162
let high = (value >> 32) as u32;
172163

173-
#[cfg(feature = "inline_asm")]
174164
unsafe {
175165
asm!(
176166
"wrmsr",
@@ -179,11 +169,6 @@ mod x86_64 {
179169
options(nostack, preserves_flags),
180170
);
181171
}
182-
183-
#[cfg(not(feature = "inline_asm"))]
184-
unsafe {
185-
crate::asm::x86_64_asm_wrmsr(self.0, low, high);
186-
}
187172
}
188173
}
189174

‎src/registers/mxcsr.rs

Lines changed: 3 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -62,37 +62,24 @@ impl Default for MxCsr {
6262
#[cfg(feature = "instructions")]
6363
mod x86_64 {
6464
use super::*;
65-
#[cfg(feature = "inline_asm")]
6665
use core::arch::asm;
6766

6867
/// Read the value of MXCSR.
6968
#[inline]
7069
pub fn read() -> MxCsr {
71-
#[cfg(feature = "inline_asm")]
72-
{
73-
let mut mxcsr: u32 = 0;
74-
unsafe {
75-
asm!("stmxcsr [{}]", in(reg) &mut mxcsr, options(nostack, preserves_flags));
76-
}
77-
MxCsr::from_bits_truncate(mxcsr)
78-
}
79-
#[cfg(not(feature = "inline_asm"))]
70+
let mut mxcsr: u32 = 0;
8071
unsafe {
81-
MxCsr::from_bits_truncate(crate::asm::x86_64_asm_read_mxcsr())
72+
asm!("stmxcsr [{}]", in(reg) &mut mxcsr, options(nostack, preserves_flags));
8273
}
74+
MxCsr::from_bits_truncate(mxcsr)
8375
}
8476

8577
/// Write MXCSR.
8678
#[inline]
8779
pub fn write(mxcsr: MxCsr) {
88-
#[cfg(feature = "inline_asm")]
8980
unsafe {
9081
asm!("ldmxcsr [{}]", in(reg) &mxcsr, options(nostack, readonly));
9182
}
92-
#[cfg(not(feature = "inline_asm"))]
93-
unsafe {
94-
crate::asm::x86_64_asm_write_mxcsr(mxcsr.bits());
95-
}
9683
}
9784

9885
#[cfg(test)]

‎src/registers/rflags.rs

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -65,7 +65,6 @@ bitflags! {
6565
#[cfg(feature = "instructions")]
6666
mod x86_64 {
6767
use super::*;
68-
#[cfg(feature = "inline_asm")]
6968
use core::arch::asm;
7069

7170
/// Returns the current value of the RFLAGS register.
@@ -81,14 +80,9 @@ mod x86_64 {
8180
pub fn read_raw() -> u64 {
8281
let r: u64;
8382

84-
#[cfg(feature = "inline_asm")]
8583
unsafe {
8684
asm!("pushfq; pop {}", out(reg) r, options(nomem, preserves_flags));
8785
}
88-
#[cfg(not(feature = "inline_asm"))]
89-
unsafe {
90-
r = crate::asm::x86_64_asm_read_rflags();
91-
}
9286

9387
r
9488
}
@@ -125,15 +119,9 @@ mod x86_64 {
125119
pub unsafe fn write_raw(val: u64) {
126120
// HACK: we mark this function as preserves_flags to prevent Rust from restoring
127121
// saved flags after the "popf" below. See above note on safety.
128-
#[cfg(feature = "inline_asm")]
129122
unsafe {
130123
asm!("push {}; popfq", in(reg) val, options(nomem, preserves_flags));
131124
}
132-
133-
#[cfg(not(feature = "inline_asm"))]
134-
unsafe {
135-
crate::asm::x86_64_asm_write_rflags(val);
136-
}
137125
}
138126

139127
#[cfg(test)]

‎src/registers/xcontrol.rs

Lines changed: 0 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -54,7 +54,6 @@ bitflags! {
5454
#[cfg(feature = "instructions")]
5555
mod x86_64 {
5656
use super::*;
57-
#[cfg(feature = "inline_asm")]
5857
use core::arch::asm;
5958

6059
impl XCr0 {
@@ -67,7 +66,6 @@ mod x86_64 {
6766
/// Read the current raw XCR0 value.
6867
#[inline]
6968
pub fn read_raw() -> u64 {
70-
#[cfg(feature = "inline_asm")]
7169
unsafe {
7270
let (low, high): (u32, u32);
7371
asm!(
@@ -78,11 +76,6 @@ mod x86_64 {
7876
);
7977
(high as u64) << 32 | (low as u64)
8078
}
81-
82-
#[cfg(not(feature = "inline_asm"))]
83-
unsafe {
84-
crate::asm::x86_64_asm_xgetbv(0)
85-
}
8679
}
8780

8881
/// Write XCR0 flags.
@@ -144,7 +137,6 @@ mod x86_64 {
144137
let low = value as u32;
145138
let high = (value >> 32) as u32;
146139

147-
#[cfg(feature = "inline_asm")]
148140
unsafe {
149141
asm!(
150142
"xsetbv",
@@ -153,11 +145,6 @@ mod x86_64 {
153145
options(nomem, nostack, preserves_flags),
154146
);
155147
}
156-
157-
#[cfg(not(feature = "inline_asm"))]
158-
unsafe {
159-
crate::asm::x86_64_asm_xsetbv(0, low, high);
160-
}
161148
}
162149
}
163150
}

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