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cpu/stm32f: boards/iot-lab_M3: cleanup and intermediate workaround #1756

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Merged
merged 3 commits into from
Oct 13, 2014
Merged

cpu/stm32f: boards/iot-lab_M3: cleanup and intermediate workaround #1756

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c27e250
at86rf231: replace vtimer_usleep by hwtimer_wait
thomaseichinger Oct 1, 2014
19db6de
cpu/stm32f1:board/iot-lab_M3: fix and cleanup for GPIO low level driver
thomaseichinger Oct 1, 2014
420f20f
cpu/stm32f1: overwrite HWTIMER_WAIT_OVERHEAD
thomaseichinger Oct 8, 2014
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80 changes: 30 additions & 50 deletions boards/iot-lab_M3/include/periph_conf.h
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Original file line number Diff line number Diff line change
Expand Up @@ -112,7 +112,7 @@
/**
* @brief GPIO configuration
*/
#define GPIO_NUMOF 16
#define GPIO_NUMOF 15
#define GPIO_0_EN 1
#define GPIO_1_EN 1
#define GPIO_2_EN 1
Expand All @@ -128,139 +128,119 @@
#define GPIO_12_EN 1
#define GPIO_13_EN 1
#define GPIO_14_EN 1
#define GPIO_15_EN 0 /* not configured */
#define GPIO_IRQ_PRIO 1

/* IRQ config */
#define GPIO_IRQ_0 GPIO_0
#define GPIO_IRQ_1 GPIO_1
#define GPIO_IRQ_2 GPIO_0 /* not configured */
#define GPIO_IRQ_3 GPIO_0 /* not configured */
#define GPIO_IRQ_4 GPIO_2
#define GPIO_IRQ_5 GPIO_3
#define GPIO_IRQ_6 GPIO_4
/**
* @brief IRQ config
*
* These defines are used for the backmapping in the matching interrupt
* service routines to call the correct callbacks.
* GPIO_IRQ_x where x matches the value defined by GPIO_y_PIN
*/
#define GPIO_IRQ_1 GPIO_13
#define GPIO_IRQ_2 GPIO_14
#define GPIO_IRQ_3 GPIO_0
#define GPIO_IRQ_4 GPIO_12
#define GPIO_IRQ_5 GPIO_8
#define GPIO_IRQ_6 GPIO_9
#define GPIO_IRQ_7 GPIO_5
#define GPIO_IRQ_8 GPIO_0 /* not configured */
#define GPIO_IRQ_9 GPIO_0 /* not configured */
#define GPIO_IRQ_10 GPIO_6
#define GPIO_IRQ_8 GPIO_1
#define GPIO_IRQ_9 GPIO_4
#define GPIO_IRQ_11 GPIO_7
#define GPIO_IRQ_12 GPIO_4
#define GPIO_IRQ_12 GPIO_2
#define GPIO_IRQ_13 GPIO_9
#define GPIO_IRQ_14 GPIO_10
#define GPIO_IRQ_15 GPIO_11

/* GPIO channel 0 config */
#define GPIO_0_PORT GPIOA /* Used for user button 1 */
#define GPIO_0_PIN 3
#define GPIO_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN)
#define GPIO_0_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI3_PA)
#define GPIO_0_EXTI_LINE 4
#define GPIO_0_IRQ EXTI4_IRQn
#define GPIO_0_IRQ EXTI3_IRQn
/* GPIO channel 1 config */
#define GPIO_1_PORT GPIOA
#define GPIO_1_PIN 8
#define GPIO_1_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN)
#define GPIO_1_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI8_PA)
#define GPIO_1_EXTI_LINE 4
#define GPIO_1_IRQ EXTI4_IRQn
#define GPIO_1_IRQ EXTI9_5_IRQn
/* GPIO channel 2 config */
#define GPIO_2_PORT GPIOA
#define GPIO_2_PIN 12
#define GPIO_2_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN)
#define GPIO_2_EXTI_CFG() (AFIO->EXTICR[3] |= AFIO_EXTICR4_EXTI12_PA)
#define GPIO_2_EXTI_LINE 4
#define GPIO_2_IRQ EXTI4_IRQn
#define GPIO_2_IRQ EXTI15_10_IRQn
/* GPIO channel 3 config */
#define GPIO_3_PORT GPIOB
#define GPIO_3_PIN 8
#define GPIO_3_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN)
#define GPIO_3_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI8_PB)
#define GPIO_3_EXTI_LINE 4
#define GPIO_3_IRQ EXTI4_IRQn
#define GPIO_3_IRQ EXTI9_5_IRQn
/* GPIO channel 4 config */
#define GPIO_4_PORT GPIOB
#define GPIO_4_PIN 9
#define GPIO_4_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN)
#define GPIO_4_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI9_PB)
#define GPIO_4_EXTI_LINE 4
#define GPIO_4_IRQ EXTI4_IRQn
#define GPIO_4_IRQ EXTI9_5_IRQn
/* GPIO channel 5 config */
#define GPIO_5_PORT GPIOC
#define GPIO_5_PIN 7
#define GPIO_5_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN)
#define GPIO_5_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI7_PC)
#define GPIO_5_EXTI_LINE 4
#define GPIO_5_IRQ EXTI4_IRQn
#define GPIO_5_IRQ EXTI9_5_IRQn
/* GPIO channel 6 config */
#define GPIO_6_PORT GPIOC
#define GPIO_6_PIN 8
#define GPIO_6_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN)
#define GPIO_6_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI8_PC)
#define GPIO_6_EXTI_LINE 4
#define GPIO_6_IRQ EXTI3_IRQn
#define GPIO_6_IRQ EXTI9_5_IRQn
/* GPIO channel 7 config */
#define GPIO_7_PORT GPIOC
#define GPIO_7_PIN 11
#define GPIO_7_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN)
#define GPIO_7_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI11_PC)
#define GPIO_7_EXTI_LINE 4
#define GPIO_7_IRQ EXTI3_IRQn
#define GPIO_7_IRQ EXTI15_10_IRQn
/* GPIO channel 8 config */
#define GPIO_8_PORT GPIOA
#define GPIO_8_PIN 5
#define GPIO_8_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN)
#define GPIO_8_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI5_PA)
#define GPIO_8_EXTI_LINE 4
#define GPIO_8_IRQ EXTI4_IRQn
#define GPIO_8_IRQ EXTI9_5_IRQn
/* GPIO channel 9 config */
#define GPIO_9_PORT GPIOA
#define GPIO_9_PIN 6
#define GPIO_9_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN)
#define GPIO_9_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI6_PA)
#define GPIO_9_EXTI_LINE 4
#define GPIO_9_IRQ EXTI4_IRQn
#define GPIO_9_IRQ EXTI9_5_IRQn
/* GPIO channel 10 config */
#define GPIO_10_PORT GPIOA
#define GPIO_10_PIN 7
#define GPIO_10_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN)
#define GPIO_10_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI7_PA)
#define GPIO_10_EXTI_LINE 4
#define GPIO_10_IRQ EXTI4_IRQn
#define GPIO_10_IRQ EXTI9_5_IRQn
/* GPIO channel 11 config */
#define GPIO_11_PORT GPIOA
#define GPIO_11_PIN 4
#define GPIO_11_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN)
#define GPIO_11_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI4_PA)
#define GPIO_11_EXTI_LINE 4
#define GPIO_11_IRQ EXTI4_IRQn
/* GPIO channel 12 config */
#define GPIO_12_PORT GPIOC
#define GPIO_12_PIN 4
#define GPIO_12_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN)
#define GPIO_12_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI4_PC)
#define GPIO_12_EXTI_LINE 4
#define GPIO_12_IRQ EXTI4_IRQn
/* GPIO channel 13 config */
#define GPIO_13_PORT GPIOC
#define GPIO_13_PIN 1
#define GPIO_13_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN)
#define GPIO_13_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI1_PC)
#define GPIO_13_EXTI_LINE 4
#define GPIO_13_IRQ EXTI4_IRQn
#define GPIO_13_IRQ EXTI1_IRQn
/* GPIO channel 14 config */
#define GPIO_14_PORT GPIOA
#define GPIO_14_PIN 2
#define GPIO_14_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN)
#define GPIO_14_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI2_PA)
#define GPIO_14_EXTI_LINE 4
#define GPIO_14_IRQ EXTI4_IRQn
/* GPIO channel 15 config */
#define GPIO_15_PORT GPIOC
#define GPIO_15_PIN 15
#define GPIO_15_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN)
#define GPIO_15_EXTI_CFG() (AFIO->EXTICR[3] |= AFIO_EXTICR4_EXTI15_PC)
#define GPIO_15_EXTI_LINE 4
#define GPIO_15_IRQ EXTI4_IRQn
#define GPIO_14_IRQ EXTI2_IRQn

/**
* @brief SPI configuration
Expand Down
1 change: 1 addition & 0 deletions cpu/stm32f1/include/hwtimer_cpu.h
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Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,7 @@
#define HWTIMER_MAXTIMERS (4) /**< the CPU implementation supports 4 HW timers */
#define HWTIMER_SPEED (1000000U) /**< the HW timer runs with 1MHz */
#define HWTIMER_MAXTICKS (0xFFFFFFFF) /**< 32-bit timer */
#define HWTIMER_WAIT_OVERHEAD (3)
/** @} */

#endif /* HWTIMER_CPU_H_ */
Expand Down
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