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Merged
merged 1 commit into from
Mar 14, 2023
+21 −0
Merged

Support for Fuchsia RISC-V target #108722

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1 change: 1 addition & 0 deletions compiler/rustc_target/src/spec/mod.rs
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Original file line number Diff line number Diff line change
@@ -1115,6 +1115,7 @@ supported_targets! {
// FIXME(#106649): Remove aarch64-fuchsia in favor of aarch64-unknown-fuchsia
("aarch64-fuchsia", aarch64_fuchsia),
("aarch64-unknown-fuchsia", aarch64_unknown_fuchsia),
("riscv64gc-unknown-fuchsia", riscv64gc_unknown_fuchsia),
// FIXME(#106649): Remove x86_64-fuchsia in favor of x86_64-unknown-fuchsia
("x86_64-fuchsia", x86_64_fuchsia),
("x86_64-unknown-fuchsia", x86_64_unknown_fuchsia),
19 changes: 19 additions & 0 deletions compiler/rustc_target/src/spec/riscv64gc_unknown_fuchsia.rs
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Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
use crate::spec::{CodeModel, SanitizerSet, Target, TargetOptions};

pub fn target() -> Target {
Target {
llvm_target: "riscv64gc-unknown-fuchsia".into(),
pointer_width: 64,
data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(),
arch: "riscv64".into(),
options: TargetOptions {
code_model: Some(CodeModel::Medium),
cpu: "generic-rv64".into(),
features: "+m,+a,+f,+d,+c".into(),
llvm_abiname: "lp64d".into(),
max_atomic_width: Some(64),
supported_sanitizers: SanitizerSet::SHADOWCALLSTACK,
..super::fuchsia_base::opts()
},
}
}
1 change: 1 addition & 0 deletions src/doc/rustc/src/platform-support.md
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Original file line number Diff line number Diff line change
@@ -295,6 +295,7 @@ target | std | host | notes
[`riscv32imac-unknown-xous-elf`](platform-support/riscv32imac-unknown-xous-elf.md) | ? | | RISC-V Xous (RV32IMAC ISA)
`riscv32imc-esp-espidf` | ✓ | | RISC-V ESP-IDF
`riscv64gc-unknown-freebsd` | | | RISC-V FreeBSD
`riscv64gc-unknown-fuchsia` | | | RISC-V Fuchsia
`riscv64gc-unknown-linux-musl` | | | RISC-V Linux (kernel 4.20, musl 1.2.0)
[`riscv64gc-unknown-openbsd`](platform-support/openbsd.md) | ✓ | ✓ | OpenBSD/riscv64
`s390x-unknown-linux-musl` | | | S390x Linux (kernel 3.2, MUSL)